Intel Xeon User Manual

Schematic Checklist
202 Design Guide
RTC
VBIAS • The VBIAS pin of the ICH3-S is connected
to a 0.047 µF capacitor.
• For noise immunity on VBIAS
signal.
• Refer to Figure 9-10.
RTCX1
RTCX2
• Connect a 32.768 kHz Crystal Oscillator
across these pins with a 10 M
Ω resistor.
Decouple each signal using a 18 pF
capacitor.
• RTCX1 may optionally be driven by an
external oscillator instead of a crystal.
These signals are 1.8 V only, and must not
be driven by a 3.3 V source.
• The external circuitry shown in
Figure 9-10 is required to
maintain the accuracy of the
RTC.
• Refer to Section 9.6.1
• The circuitry is required
because the new RTC oscillator
is sensitive to step voltage
changes in VCCRTC and
VBIAS. A negative step on the
power supply of more than
100 mV will temporarily shut off
the oscillator for hundreds of
milliseconds.
• Refer to Section 9.6.2 for
decoupling requirements.
System Management
SMBDATA
SMBCLK
• Require external pull-up resistors. See
SMBus Architecture and Design
Consideration section to determine the
appropriate power well to use to tie the pull-
up resistors (core well, suspend well, or a
combination).
• Pull-up value also determined by bus
section characteristics. Additional circuitry
may be required to connect high and low
powered sections.
• SMBCLK required to be tied to SMLink0 and
SMBDATA required to be tied to SMLink1
for SMBus 2.0 compliance.
• Value of pull-up resistors
determined by line load. Typical
value used is
8.2 k
Ω ± 5%.
• Refer to Section 9.5.
SMBALERT#/
GPIO[11]
• See GPIO section if SMBALERT# not
implemented.
SMLINK[1:0] • Requires external pull-up resistors. See
SMBus Architecture and Design
Consideration section to determine the
appropriate power well to use to tie the pull-
up resistors. (Core well, suspend well, or a
combination.)
• Pull-up value also determined by bus
section characteristics. Additional circuitry
may be required to connect high and low
powered sections.
• SMLink0 required to be tied to SMBCLK and
SMLink1 required to be tied to SMBDATA
for SMBus 2.0 compliance.
• Value of pull-ups resistors
determined by line load. Typical
value used is 8.2 k
Ω ± 5%.
• Refer to Section 9.5.
INTRUDER# • Pull signal to VCCRTC (VBAT) if not
needed.
• Signal in VCCRTC (VBAT) well.
• Refer to Section 9.6.8.
Table 13-3. Intel
®
ICH3-S Schematic Checklist (Sheet 7 of 8)
Checklist Items Recommendations Comments

Intel Xeon Specifications

General

Brand	Intel
Model	Xeon
Category	Processor
Language	English