U8480 Series Remote Operation 1
U8480 Series Programming Guide 55
When a status group is implemented in an instrument, it always contains all of the
component registers. However, there is not always a corresponding command to
read or write to every register.
Condition register
The condition register continuously monitors the hardware and firmware status of
the U8480 Series. There is no latching or buffering for this register; it is updated in
real time. Condition registers are read-only.
Transition filter
The transition filter specifies which type of changes to the bit state in the
condition register will set corresponding bits in the event register. Transition filter
bits may be set for positive transitions (PTR), negative transitions (NTR), or both.
Positive transition will cause the corresponding bit in the event register to be set
when the condition bit changes from 0 to 1. Negative transition will cause the
corresponding bit in the event register to be set when the condition bit changes
from 1 to 0. Setting both positive and negative transitions will cause the
corresponding bit in the event register to be set whenever the condition bit
changes. Clearing both the positive and negative transition filters disables the
corresponding bit in the event register to be set. Transition filters are read-write.
They are unaffected by clear status (*CLS) or queries.
Event register
The event register latches transition events from the condition register as
specified by the transition filter. Bits in the event register are latched, and once
the bits are set, they will remain set until they are cleared by a query or clear
status (*CLS). There is no buffering; therefore, while an event bit is set,
subsequents events corresponding to that bit are ignored. Event registers are
read-only.
Enable register
The enable register specifies which bits in the event register can generate a
summary bit. The instrument logically ANDs corresponding bits in the event and
enable registers, and ORs all the resulting bits to obtain a summary bit. Summary
bits are, in turn, recorded in another register, usually the Status Byte. Enable
registers are read-write. They are not affected by clear status (*CLS) or querying
the enable registers. There is always a command to read and write to the enable
register of a particular status group.
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