Keysight U8480 Series - Table 1-4 Bit Definitions - Status Byte Register

1 U8480 Series Remote Operation
60 U8480 Series Programming Guide
Status byte summary register
The status byte summary register reports conditions from other status registers.
Query data waiting in the U8480 Series output buffer is immediately reported
through the “message available” bit (bit 4). Clearing an event register clears the
corresponding bits in the status byte summary register. Reading all messages in
the output buffer, including any pending queries, clears the message available bit.
Table 1-4 Bit definitions - Status byte register
Particular bits in the status byte register are cleared when:
– The standard event, questionable status, operation status, and device status
are queried.
– The error or event queue becomes empty.
– The output queue becomes empty.
Bit number Decimal weight Definition
0 1 Not Used (Always set to 0)
1 2 Device Status Register summary bit
One or more bits are set in the Device Status Register (bits must be “enabled” in
the enable register)
24Error/Event Queue
3 8 Questionable Status Register summary bit
One or more bits are set in the Questionable Status Register (bits must be
“enabled” in the enable register)
4 16 Data Available
Data is available in the U8480 Series output buffer
532Standard Event
One or more bits are set in the Standard Event register (bits must be “enabled” in
the enable register)
6 64 Request Service
The U8480 Series is requesting service (serial poll)
7 128 Operation Status Register summary bit
One or more bits are set in the Operation Status Register (bits must be “enabled”
in the enable register)