Microchip Technology dsPIC30F - Page 109

© 2004 Microchip Technology Inc. DS70052C-page 5-13
Section 5. Flash and EEPROM Programming
Flash and EEPROM
Programming
5
5.4.2.4 Single Row Programming Example
An example of single row programming code is:
; Setup NVMCON to write multiple words of program memory
MOV #0x4001,W0
MOV W0
,
NVMCON
; The following code segment should be repeated 8 times to program the entire row
; (32 instructions)
; Load the 4 program memory write latches
CALL Load_Write_Latch
(1)
; Disable interrupts, if enabled
PUSH SR
MOV #0x00E0,W0
IOR SR
; Write the KEY sequence
MOV #0x55,W0
MOV W0,NVMKEY
MOV #0xAA,W0
MOV W0,NVMKEY
; Start the programming sequence
BSET NVMCON,#WR
; Insert two NOPs after programming
NOP
NOP
; Re-enable interrupts, if required
POP SR
Note 1: See Section 5.4.2.3 “Loading Write Latches”
5.4.3 Writing to Device Configuration Registers
RTSP may be used to write to the Device Configuration registers. RTSP allows each Configura-
tion register to be individually rewritten without first performing an erase cycle. Caution must be
exercised when writing the Configuration registers since they control critical device operating
parameters, such as the system clock source, PLL multiplication ratio and WDT enable.
The procedure for programming a Device Configuration register is similar to the procedure for
Flash program memory, except that only TBLWTL instructions are required. This is because the
upper 8 bits are unused in each Device Configuration register. Furthermore, bit 23 of the table
write address must be set to access the Configuration registers. Refer to Section 24. “Device
Configuration” and the device data sheet for a full description of the Device Configuration
registers.
5.4.3.1 Configuration Register Write Algorithm
1. Write the new configuration value to the table write latch using a TBLWTL instruction.
2. Configure NVMCON for a Configuration register write (NVMCON = 0x4008).
3. Disable interrupts, if enabled.
4. Write the key sequence to NVMKEY.
5. Start the write sequence by setting WR (NVMCON<15>).
6. CPU execution will resume when the write is finished.
7. Re-enable interrupts, if needed.