Microchip Technology dsPIC30F - Page 135

© 2004 Microchip Technology Inc. DS70053C-page 6-17
Section 6. Interrupts
Interrupts
6
Register 6-4: INTCON2: Interrupt Control Register 2
Upper Byte:
R/W-0 R-0 U-0 U-0 U-0 U-0 U-0 U-0
ALTIVT DISI
— — — — — —
bit 15 bit 8
Lower Byte:
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — INT4EP INT3EP INT2EP INT1EP INT0EP
bit 7 bit 0
bit 15 ALTIVT: Enable Alternate Interrupt Vector Table bit
1 = Use alternate vector table
0 = Use standard (default) vector table
bit 14 DISI: DISI Instruction Status bit
1 = DISI instruction is active
0 = DISI is not active
bit 13-5 Unimplemented: Read as ‘0’
bit 4 INT4EP: External Interrupt #4 Edge Detect Polarity Select bit
1 = Interrupt on negative edge
0 = Interrupt on positive edge
bit 3 INT3EP: External Interrupt #3 Edge Detect Polarity Select bit
1 = Interrupt on negative edge
0 = Interrupt on positive edge
bit 2 INT2EP: External Interrupt #2 Edge Detect Polarity Select bit
1 = Interrupt on negative edge
0 = Interrupt on positive edge
bit 1 INT1EP: External Interrupt #1 Edge Detect Polarity Select bit
1 = Interrupt on negative edge
0 = Interrupt on positive edge
bit 0 INT0EP: External Interrupt #0 Edge Detect Polarity Select bit
1 = Interrupt on negative edge
0 = Interrupt on positive edge
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown