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Microchip Technology dsPIC30F - Page 147

Microchip Technology dsPIC30F
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© 2004 Microchip Technology Inc. DS70053C-page 6-29
Section 6. Interrupts
Interrupts
6
Register 6-10: IEC2: Interrupt Enable Control Register 2 (Continued)
bit 1 OC6IE: Output Compare Channel 6 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 0 OC5IE: Output Compare Channel 5 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set 0’ = Bit is cleared x = Bit is unknown

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