Microchip Technology dsPIC30F - Page 151

© 2004 Microchip Technology Inc. DS70053C-page 6-33
Section 6. Interrupts
Interrupts
6
Register 6-14: IPC3: Interrupt Priority Control Register 3
Upper Byte:
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— CNIP<2:0> — MI2CIP<2:0>
bit 15 bit 8
Lower Byte:
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
—SI2CIP<2:0>— NVMIP<2:0>
bit 7 bit 0
bit 15 Unimplemented: Read as ‘0’
bit 14-12 CNIP<2:0>: Input Change Notification Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 11 Unimplemented: Read as ‘0’
bit 10-8 MI2CIP<2:0>: I
2
C Bus Collision Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as ‘0’
bit 6-4 SI2CIP<2:0>: I
2
C Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 3 Unimplemented: Read as ‘0’
bit 2-0 NVMIP<2:0>: Non-Volatile Memory Write Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown