Microchip Technology dsPIC30F - Page 262

dsPIC30F Family Reference Manual
DS70059C-page 12-20 © 2004 Microchip Technology Inc.
12.10.3 Asynchronous Counter Mode
Type B and Type C time bases do not support the Asynchronous External Clock mode.
Therefore, no 32-bit Asynchronous Counter mode is supported.
12.10.4 Gated Time Accumulation Mode
The 32-bit timer operates similarly to a 16-bit timer in Gated Time Accumulation mode.
Example 12-7 shows how to configure a 32-bit timer in Gated Time Accumulation mode. This
example assumes Timer2 is a Type B time base and Timer3 is a Type C time base.
Example 12-7: Initialization Code for 32-bit Gated Time Accumulation Mode
; The following code example will enable Timer2 interrupts, load the
; Timer3:Timer2 Period register and start the 32-bit timer module
; consisting of Timer3 and Timer2. When a 32-bit period match occurs
; the timer will simply roll over and continue counting.
; However, when at the falling edge of the Gate signal on T2CK
; an interrupt is generated, if enabled. The user must clear the
; Timer3 interrupt status flag in the software.
CLR T2CON ; Stops any 16/32-bit Timer2 operation
CLR T3CON ; Stops any 16-bit Timer3 operation
CLR TMR3 ; Clear contents of the Timer3 register
CLR TMR2 ; Clear contents of the Timer2 register
MOV #0xFFFF, w0 ; Load the Period Register3
MOV w0, PR3 ; with the value 0xFFFF
MOV w0, PR2 ; Load the Period Register2 with value 0xFFFF
BSET IPC1, #T3IP0 ; Setup Timer3 interrupt for
BCLR IPC1, #T3IP1 ; desired priority level
BCLR IPC1, #T3IP2 ; (this example assigns level 1 priority)
BCLR IFS0, #T3IF ; Clear the Timer3 interrupt status flag
BSET IEC0, #T3IE ; Enable Timer3 interrupts
MOV #0x804C, w0 ; Enable 32-bit Timer operation and
MOV w0, T2CON ; Start 32-bit timer in gated time
; accumulation mode.
; Example code for Timer3 ISR
__T3Interrupt:
BCLR IFS0, #T3IF ; Reset Timer3 interrupt flag
; User code goes here.
RETFIE ; Return from ISR