© 2004 Microchip Technology Inc. DS70060C-page 13-5
Section 13. Input Capture
Input Capture
13
Figure 13-2: Simple Capture Event Timing Diagram, Time Base Prescaler = 1:1
Figure 13-3: Simple Capture Event Timing Diagram, Time Base Prescaler = 1:4
Capture Data
n+2 n+3 n+4
n-2 n-1 n n+1n-3
TMR2
n+1
ICx pin
n+5
Note 1: A capture signal edge that occurs in this region will result in a capture buffer entry value of 1 or 2 timer counts from
the capture signal edge.
See Note 1
TCY
ICxIF Set
Capture Data
n+1
n-1 n
TMRy
n
ICx pin
ICxIF Set
T
CY
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