dsPIC30F Family Reference Manual
DS70060C-page 13-6 © 2004 Microchip Technology Inc.
13.4.2 Prescaler Capture Events
The capture module has two Prescaled Capture modes. The Prescale modes are selected by
setting the ICM<2:0> (ICxCON<2:0>) bits to ‘100’ or ‘101’, respectively. In these modes, the
capture module counts four or sixteen rising edge pin events before a capture event occurs.
The capture prescaler counter is incremented on every valid rising edge applied to the capture
pin. The rising edge applied to the pin effectively serves as a clock to a counter. When the
prescaler counter equals four or sixteen counts (depending on the mode selected), the counter
will output a “valid” capture event signal, which is then synchronized to the instruction cycle clock.
This synchronized capture event signal will trigger a capture buffer write event and signal the
interrupt generation logic. The respective capture channel interrupt status flag, ICxIF, is asserted
2 instruction cycles after the capture buffer write event.
If the capture time base increments every instruction cycle, the captured count value will be the
value that was present 1 or 2 instruction cycles past the time of the synchronized capture event.
The input capture pin has minimum high time and low time specifications. Refer to the “Electrical
Specifications” section of the device data sheet for further details.
Switching from one prescale setting to another may generate an interrupt. Also, the prescaler
counter will not be cleared, therefore, the first capture may be from a non-zero prescaler.
Example 13-1 shows the recommended method for switching between capture prescale
settings.
The prescaler counter is cleared when:
• The capture channel is turned off (i.e., ICM<2:0> = ‘000’).
• Any device Reset.
The prescaler counter is not cleared when:
• The user switches from one active Capture mode to another.
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