Section 14. Output Compare
Output
Compare
14
© 2004 Microchip Technology Inc. DS70061C-page 14-25
IFS1 0086 IC6IF IC5IF IC4IF IC3IF C1IF SPI2IF U2TXIF U2RXIF INT2IF T5IF T4IF OC4IF OC3IF IC8IF IC7IF INT1IF
0000 0000 0000 0000
IFS2 0088
— — —
FLTBIF FLTAIF LVDIF DCIIF QEIIF PWMIF C2IF INT4IF INT3IF OC8IF OC7IF OC6IF OC5IF
0000 0000 0000 0000
IEC0 008C CNIE MI2CIE SI2CIE NVMIE ADIE U1TXIE U1RXIE SPI1IE T3IE T2IE OC2IE IC2IE T1IE OC1IE IC1IE INT0IE
0000 0000 0000 0000
IEC1 008E
IC6IE IC5IE IC4IE IC3IE C1IE SPI2IE U2TXIE U2RXIE INT2IE T5IE T4IE OC4IE OC3IE IC8IE IC7IE INT1IE
0000 0000 0000 0000
IEC2 0090
— — —
FLTBIE FLTAIE LVDIE DCIIE QEIIE PWMIE C2IE INT4IE INT3IE OC8IE OC7IE OC6IE OC5IE
0000 0000 0000 0000
IPC0 0094
—
T1IP<2:0>
—
OC1IP<2:0>
—
IC1IP<2:0>
—
INT0IP<2:0>
0100 0100 0100 0100
IPC1 0096
—
T3IP<2:0>
—
T2IP<2:0>
—
OC2IP<2:0>
—
IC2IP<2:0>
0100 0100 0100 0100
IPC4 009C
—
OC3IP<2:0>
—
IC8IP<2:0>
—
IC7IP<2:0>
—
INT1IP<2:0>
0100 0100 0100 0100
IPC5 009E
—
INT2IP<2:0>
—
T5IP<2:0>
—
T4IP<2:0>
—
OC4IP<2:0>
0100 0100 0100 0100
IPC8 00A4
—
OC8IP<2:0>
—
OC7IP<2:0>
—
OC6IP<2:0>
—
OC5IP<2:0>
0100 0100 0100 0100
Table 14-6: Example Register Map Associated with Output Compare Module (Continued)
SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
Legend: u = uninitialized
Note: The register map will depend on the number of output compare modules on the device. Please refer to the device data sheet for details.