Microchip Technology dsPIC30F - Page 322

dsPIC30F Family Reference Manual
DS70062C-page 15-12 © 2004 Microchip Technology Inc.
Register 15-10: FLTBCON: Fault B Control Register
Upper Byte:
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
FBOV4H FBOV4L FBOV3H FBOV3L FBOV2H FBOV2L FBOV1H FBOV1L
bit 15 bit 8
Lower Byte:
R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
FLTBM
— — — FBEN4 FBEN3 FBEN2 FBEN1
bit 7 bit 0
bit 15-8 FBOV4H:FBOV1L: Fault Input B PWM Override Value bits
1 = The PWM output pin is driven ACTIVE on an external fault input event
0 = The PWM output pin is driven INACTIVE on an external fault input event
bit 7 FLTBM: Fault B Mode bit
1 = The Fault B input pin functions in the cycle-by-cycle mode
0 = The Fault B input pin latches all control pins to the programmed states in FLTBCON<15:8>
bit 6-4 Unimplemented: Read as ‘0’
bit 3 FAEN4: Fault Input B Enable bit
(1)
1 = PWM4H/PWM4L pin pair is controlled by Fault Input B
0 = PWM4H/PWM4L pin pair is not controlled by Fault Input B
bit 2 FAEN3: Fault Input B Enable bit
(1)
1 = PWM3H/PWM3L pin pair is controlled by Fault Input B
0 = PWM3H/PWM3L pin pair is not controlled by Fault Input B
bit 1 FAEN2: Fault Input B Enable bit
(1)
1 = PWM2H/PWM2L pin pair is controlled by Fault Input B
0 = PWM2H/PWM2L pin pair is not controlled by Fault Input B
bit 0 FAEN1: Fault Input B Enable bit
(1)
1 = PWM1H/PWM1L pin pair is controlled by Fault Input B
0 = PWM1H/PWM1L pin pair is not controlled by Fault Input B
Note 1: Fault pin A has priority over Fault pin B, if enabled.
Legend:
R = Readable bit W = Writable bit U = Unimplemented, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown