dsPIC30F Family Reference Manual
DS70049C-page 2-16 © 2004 Microchip Technology Inc.
2.4.3 Other dsPIC30F CPU Control Registers
The registers listed below are associated with the dsPIC30F CPU core, but are described in
further detail in other sections of this manual.
2.4.3.1 TBLPAG: Table Page Register
The TBLPAG register is used to hold the upper 8 bits of a program memory address during table
read and write operations. Table instructions are used to transfer data between program memory
space and data memory space. Refer to Section 4. “Program Memory” for further details.
2.4.3.2 PSVPAG: Program Space Visibility Page Register
Program space visibility allows the user to map a 32-Kbyte section of the program memory space
into the upper 32 Kbytes of data address space. This feature allows transparent access of
constant data through dsPIC30F instructions that operate on data memory. The PSVPAG
register selects the 32 Kbyte region of program memory space that is mapped to the data
address space. Refer to Section 4. “Program Memory” for more information on the PSVPAG
register.
2.4.3.3 MODCON: Modulo Control Register
The MODCON register is used to enable and configure modulo addressing (circular buffers).
Refer to Section 3. “Data Memory” for further details on modulo addressing.
2.4.3.4 XMODSRT, XMODEND: X Modulo Start and End Address Registers
The XMODSRT and XMODEND registers hold the start and end addresses for modulo (circular)
buffers implemented in the X data memory address space. Refer to Section 3. “Data Memory”
for further details on modulo addressing.
2.4.3.5 YMODSRT, YMODEND: Y Modulo Start and End Address Registers
The YMODSRT and YMODEND registers hold the start and end addresses for modulo (circular)
buffers implemented in the Y data memory address space. Refer to Section 3. “Data Memory”
for further details on modulo addressing.
2.4.3.6 XBREV: X Modulo Bit-Reverse Register
The XBREV register is used to set the buffer size used for bit-reversed addressing. Refer to
Section 3. “Data Memory” for further details on bit-reversed addressing.
2.4.3.7 DISICNT: Disable Interrupts Count Register
The DISICNT register is used by the DISI instruction to disable interrupts of priority 1-6 for a
specified number of cycles. See Section 6. “Reset Interrupts” for further information.
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