dsPIC30F Family Reference Manual
DS70065C-page 18-16 © 2004 Microchip Technology Inc.
18.11.2 Clocked Conversion Trigger
When SSRC<2:0> = 111, the conversion trigger is under A/D clock control. The SAMC bits
(ADCON3<12:8>) select the number of T
AD clock cycles between the start of sampling and the
start of conversion. After the start of sampling, the module will count a number of T
AD clocks
specified by the SAMC bits.
Equation 18-2: Clocked Conversion Trigger Time
SAMC must always be programmed for at least 1 clock cycle to ensure sampling requirements are
met.
Figure 18-5 shows how to use the clocked conversion trigger with the sampling started by the user
software.
Figure 18-5: Converting 1 Channel, Manual Sample Start, T
AD Based Conversion Start
Example 18-2: Converting 1 Channel, Manual Sample Start,
T
AD Based Conversion Start Code Example
TSMP = SAMC<4:0> *TAD
ADCLK
SAMP
ADCBUF0
TSAMP
TCONV
BSF ADCON1,SAMP
Instruction Execution
DONE
ADPCFG = 0xEFFF; // all PORTB = Digital; RB12 = analog
ADCON1 = 0x00E0; // SSRC bit = 111 implies internal
// counter ends sampling and starts
// converting.
ADCHS = 0x000C; // Connect RB12/AN12 as CH0 input ..
// in this example RB12/AN12 is the input
ADCSSL = 0;
ADCON3 = 0x1F02; // Sample time = 31Tad, Tad = internal 2
Tcy
ADCON2 = 0;
ADCON1bits.ADON = 1; // turn ADC ON
while (1) // repeat continuously
{
ADCON1bits.SAMP = 1; // start sampling then ...
// after 31Tad go to conversion
while (!ADCON1bits.DONE);// conversion done?
ADCValue = ADCBUF0; // yes then get ADC value
} // repeat// repeat