dsPIC30F Family Reference Manual
DS70067C-page 20-12 © 2004 Microchip Technology Inc.
Figure 20-5: SPI Slave Mode Operation with Slave Select Pin Enabled
SCKx
(CKP = 1
SCKx
(CKP = 0
Input
Sample
SDIx
bit7
bit0
SDOx bit7
bit6
bit5 bit4
bit3
bit2
bit1 bit0
SPIxIF
(SMP = 0)
CKE = 0)
CKE = 0)
(SMP = 0)
User writes
SPIxBUF
SPIxSR to
SPIxBUF
SSx
Note 1: When the SSEN (SPIxCON<7>) bit is set to ‘1’, the SSx pin must be driven low so as to enable transmission and
reception in Slave mode.
2: Transmit data is held in SPIxTXB and SPITBF remains set until all bits are transmitted.
3: Operation for 8-bit mode shown. The 16-bit mode is similar.
User reads
SPIxBUF
SPIRBF
1 instruction
cycle latency
SPITBF
SPIxBUF
to
SPIxSR
to
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