© 2004 Microchip Technology Inc. DS70067C-page 20-11
Section 20. Serial Peripheral Interface (SPI)
Serial Peripheral
Interface (SPI)
20
Figure 20-4: SPI Slave Mode Operation: Slave Select Pin Disabled
SCKx Input
(CKP =
1
SCKx Input
(CKP =
0
Input
Sample
SDIx Input
bit7
bit0
SDOx
bit7
bit6
bit5 bit4
bit3
bit2
bit1 bit0
SPIxIF
(SMP =
0
)
CKE =
0
)
CKE =
0
)
(SMP =
0
)
User writes to
SPIxBUF
SPISR to
SPIxRXB
SPITBF
SPIRBF
Output
Note 1: Two SPI Clock modes shown only to demonstrate CKP (SPIxCON<6>) and CKE (SPIxCON<8>) bit functionality.
Any combination of CKP and CKE bits can be chosen for module operation.
2: If there are no pending transmissions or a transmission in progress, SPIxBUF is transferred to SPIxSR as soon
as the user writes to SPIxBUF.
3: Operation for 8-bit mode shown. The 16-bit mode is similar.
1 instruction cycle latency to set
SPIxIF flag bit
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