Microchip Technology dsPIC30F - Page 54

dsPIC30F Family Reference Manual
DS70049C-page 2-36 © 2004 Microchip Technology Inc.
2.10.1 Read-After-Write Dependency Rules
If the W register is used as a write operation destination in the current instruction and the W
register being read in the pre-fetched instruction are the same, the following rules will apply:
1. If the destination write (current instruction) does not modify the contents of Wn, no stalls
will occur.
or
2. If the source read (pre-fetched instruction) does not calculate an EA using Wn, no stalls
will occur.
During each instruction cycle, the dsPIC30F hardware automatically checks to see if a RAW data
dependency is about to occur. If the conditions specified above are not satisfied, the CPU will
automatically add a one instruction cycle delay before executing the pre-fetched instruction. The
instruction stall provides enough time for the destination W register write to take place before the
next (pre-fetched) instruction has to use the written data.
Table 2-7: Read-After-Write Dependency Summary
2.10.2 Instruction Stall Cycles
An instruction stall is essentially a one instruction cycle wait period appended in front of the read
phase of an instruction, in order to allow the prior write to complete before the next read opera-
tion. For the purposes of interrupt latency, it should be noted that the stall cycle is associated with
the instruction following the instruction where it was detected (i.e., stall cycles always precede
instruction execution cycles).
Destination
Addressing Mode
using Wn
Source
Addressing Mode
using Wn
Status
Examples
(Wn = W2)
Direct Direct Allowed ADD.w W0, W1, W2
MOV.w W2, W3
Direct Indirect Stall ADD.w W0, W1, W2
MOV.w [W2], W3
Direct Indirect with
modification
Stall ADD.w W0, W1, W2
MOV.w [W2++], W3
Indirect Direct Allowed ADD.w W0, W1, [W2]
MOV.w W2, W3
Indirect Indirect Allowed ADD.w W0, W1, [W2]
MOV.w [W2], W3
Indirect Indirect with
modification
Allowed ADD.w W0, W1, [W2]
MOV.w [W2++], W3
Indirect with
modification
Direct Allowed ADD.w W0, W1, [W2++]
MOV.w W2, W3
Indirect Indirect Stall ADD.w W0, W1, [W2]
MOV.w [W2], W3
; W2=0x0004 (mapped W2)
Indirect Indirect with
modification
Stall ADD.w W0, W1, [W2]
MOV.w [W2++], W3
; W2=0x0004 (mapped W2)
Indirect with
modification
Indirect Stall ADD.w W0, W1, [W2++]
MOV.w [W2], W3
Indirect with
modification
Indirect with
modification
Stall ADD.w W0, W1, [W2++]
MOV.w [W2++], W3