© 2004 Microchip Technology Inc. DS70074C-page 26-3
Section 26. Appendix
Appendix
26
A.1 Initiating and Terminating Data Transfer
During times of no data transfer (idle time), both the clock line (SCL) and the data line (SDA) are
pulled high through the external pull-up resistors. The Start and Stop conditions determine the
start and stop of data transmission. The Start condition is defined as a high-to-low transition of
the SDA when the SCL is high. The Stop condition is defined as a low-to-high transition of the
SDA when the SCL is high. Figure A-1 shows the Start and Stop conditions. The master
generates these conditions for starting and terminating data transfer. Due to the definition of the
Start and Stop conditions, when data is being transmitted, the SDA line can only change state
when the SCL line is low.
Figure A-1: Start and Stop Conditions
Table A-1: I
2
C Bus Terminology
SDA
SCL
S
P
Start
Condition
Change
of Data
Allowed
Change
of Data
Allowed
Stop
Condition
Term Description
Transmitter The device that sends the data to the bus.
Receiver The device that receives the data from the bus.
Master The device which initiates the transfer, generates the clock and terminates
the transfer.
Slave The device addressed by a master.
Multi-master More than one master device in a system. These masters can attempt to
control the bus at the same time without corrupting the message.
Arbitration Procedure that ensures that only one of the master devices will control the
bus. This ensures that the transfer data does not get corrupted.
Synchronization Procedure where the clock signals of two or more devices are synchronized.
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