dsPIC30F Family Reference Manual
DS70074C-page 26-28 © 2004 Microchip Technology Inc.
C.4.2 Slot #0, TAG Frame
Slot #0 is commonly called the ‘tag frame’. The tag frame has a bit location for each data time
slot in the AC-Link protocol. These bits are used to specify which time slots in a frame are valid
for use by the controller. A “1” in a given bit position of Slot #0 indicates that the corresponding
time slot within the current audio frame has been assigned to a data stream, and contains valid
data. If a slot is “tagged” invalid, it is the responsibility of the source of the data, (AC ‘97 codec
for the input stream, AC ’97 controller for the output stream), to stuff all bit positions with 0s
during the slot’s active time.
There are also special bits in the tag frame. The MSb of the tag frame for SDATA_OUT is a
‘Frame Valid’ Status bit. The Frame Valid bit serves as a global indicator to the codec that at
least one time slot in the frame has valid data. If the entire frame is tagged invalid, the codec
can ignore all subsequent slots in the frame. This feature is used to implement sample rates
other than 48 kHz.
The two LSbs of the SDATA_OUT tag frame indicate the codec address. Up to four AC ‘97
codecs may be connected in a system. If only one codec is used in a system, these bits remain
0’s.
The MSb of the SDATA_IN is used as a ‘Codec Ready’ Status bit. If this bit location is a ‘0’, then
the codec is powered down and/or not ready for normal operation. If the ‘Codec Ready’ bit is
set, it is the responsibility of the controller to query the status registers in the codec to see which
subsections are operable.
C.4.3 Slot #1 (Command Address) and Slot #2 (Command Data)
Slot #1 and Slot #2 also have special uses in the AC-Link protocol. These time slots are used
for address and data values when reading or writing the AC ‘97 codec control registers. These
time slots must be tagged as valid in Slot #0 in order to read and write the control registers. The
AC ‘97 Component Specification allows for sixty-four (64) 16-bit control registers in the codec.
Seven address bits are provided in the AC-Link protocol, but only even-numbered addresses
are used. The odd numbered address values are reserved.
Slot #1 and Slot #2 for the SDATA_OUT line are called the Command Address and Command
Data, respectively. The Command Address slot on the SDATA_OUT line is used to specify the
codec register address and to specify whether the register access will be a read or a write. The
Command Data slot on SDATA_OUT contains the 16-bit value that will be written to one of the
codec control registers. If a read of the codec registers is being performed, the Command Data
bits are set to ‘0’s.
Slot #1 and Slot #2 for the SDATA_IN line are called the Status Address and Status Data slots,
respectively. The Status Address time slot echos the register address that was previously sent
to the codec. If this value is ‘0’, an invalid address was previously sent to the codec.
The Status Address time slot also has ten Slot Request bits. The Slot Request bits can be
manipulated by the codec for applications with variable sample rates.
The Status Data time slot returns 16-bit data read from the codec control/status registers.
C.4.4 Slot #3 (PCM Left Channel)
Slot #3 in the SDATA_OUT signal is used for the composite digital audio left playback stream.
For soundcard applications, this is typically the combined .WAV audio and MIDI synthesizer
output.
Slot #3 in the SDATA_IN signal is the left channel record data taken from the AC ‘97 codec input
mixer.
C.4.5 Slot #4 (PCM Right Channel)
Slot #4 in the SDATA_OUT signal is used for the composite digital audio right playback stream.
For soundcard applications, this is typically the combined .WAV audio and MIDI synthesizer
output.
Slot #4 in the SDATA_IN signal is the right channel record data taken from the AC ‘97 codec
input mixer.
To Next Page
Loading...
