R&S ESR Series User Manual

Remote Control
R&S
®
ESR
583User Manual 1175.7068.02 ─ 12
Table 11-11: Meaning of the bits used in the STATus:QUEStionable:LIMit register
Bit No. Meaning
0 LIMit 1 FAIL
This bit is set if limit line 1 is violated.
1 LIMit 2 FAIL
This bit is set if limit line 2 is violated.
2 LIMit 3 FAIL
This bit is set if limit line 3 is violated.
3 LIMit 4 FAIL
This bit is set if limit line 4 is violated.
4 LIMit 5 FAIL
This bit is set if limit line 5 is violated.
5 LIMit 6 FAIL
This bit is set if limit line 6 is violated.
6 LIMit 7 FAIL
This bit is set if limit line 7 is violated.
7 LIMit 8 FAIL
This bit is set if limit line 8 is violated.
8 to 14 Unused
15 This bit is always 0.
STATus:QUEStionable:LMARgin Register
This register contains information about the observance of limit margins.
You can read out the register with STATus:QUEStionable:LMARgin<n>:
CONDition? or STATus:QUEStionable:LMARgin<n>[:EVENt]?.
Table 11-12: Meaning of the bits used in the STATus:QUEStionable:LMARgin register
Bit No. Meaning
0 LMARgin 1 FAIL
This bit is set if limit margin 1 is violated.
1 LMARgin 2 FAIL
This bit is set if limit margin 2 is violated.
2 LMARgin 3 FAIL
This bit is set if limit margin 3 is violated.
3 LMARgin 4 FAIL
This bit is set if limit margin 4 is violated.
4 LMARgin 5 FAIL
This bit is set if limit margin 5 is violated.
5 LMARgin 6 FAIL
This bit is set if limit margin 6 is violated.
Remote Control - Basics

R&S ESR Series Specifications

General

Brand	R&S
Model	ESR Series
Category	Receiver
Language	English