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R&S ESR Series User Manual

R&S ESR Series
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Remote Control
R&S
®
ESR
588User Manual 1175.7068.02 ─ 12
Bit No. Meaning
8 CALibration
This bit is set if the R&S ESR is unaligned ("UNCAL" display)
9 LIMit (device-specific)
This bit is set if a limit value is violated.
The STATus:QUEStionable:LIMit Register provides more information on the error type.
10 LMARgin (device-specific)
This bit is set if a margin is violated.
The STATus:QUEStionable:LMARgin Register provides more information on the error type.
11 Not used
12 ACPLimit (device-specific)
This bit is set if a limit during ACLR measurements is violated.
The STATus:QUEStionable:ACPLimit Register provides more information on the error type.
13 - 14 Not used
15 This bit is always 0.
STATus:QUEStionable:ACPLimit Register
The STATus:QUEStionable:ACPLimit register contains information about the results of
a limit check during ACLR measurements.
You can read out the register with STATus:QUEStionable:ACPLimit:CONDition?
or STATus:QUEStionable:ACPLimit[:EVENt]?.
Table 11-17: Meaning of the bits used in the STATus:QUEStionable:ACPLimit register
Bit No. Meaning
0 ADJ UPPer FAIL
This bit is set if the limit is exceeded in the upper adjacent channel
1 ADJ LOWer FAIL
This bit is set if the limit is exceeded in the lower adjacent channel.
2 ALT1 UPPer FAIL
This bit is set if the limit is exceeded in the upper 1st alternate channel.
3 ALT1 LOWer FAIL
This bit is set if the limit is exceeded in the lower 1st alternate channel.
4 ALT2 UPPer FAIL
This bit is set if the limit is exceeded in the upper 2nd alternate channel.
5 ALT2 LOWer FAIL
This bit is set if the limit is exceeded in the lower 2nd alternate channel.
6 ALT3 … 11 LOWer/UPPer FAIL
This bit is set if the limit is exceeded in one of the lower or upper alternate channels 3 … 11.
Remote Control - Basics

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R&S ESR Series Specifications

General IconGeneral
BrandR&S
ModelESR Series
CategoryReceiver
LanguageEnglish

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