RL78/G1H CHAPTER 6 CLOCK GENERATOR
R01UH0575EJ0120 Rev. 1.20 Page 113 of 920
Dec 22, 2016
Figure 6 - 10 Format of Peripheral enable register 1 (PER1)
Address: F007AH After reset: 00H R/W
Symbol 7 6 5 4 <3> 2 1 <0>
PER1
0
0 0 0 DTCEN 0 0 TRJ0EN
DTCEN Control of DTC input clock supply
0 Stops input clock supply.
• DTC cannot run.
1 Enables input clock supply.
• DTC can run.
TRJ0EN Control of timer RJ0 input clock supply
0 Stops input clock supply.
• SFR used by timer RJ0 cannot be written.
• Timer RJ0 is in the reset status.
1 Enables input clock supply.
• SFR used by timer RJ0 can be read and written.
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