RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 417 of 920
Dec 22, 2016
Figure 14 - 81 Example of Contents of Registers for UART Reception of UART (UARTq) (2/2)
(e) Serial output register m (SOm)... The register that not used in this mode.
(f) Serial output enable register m (SOEm)... The register that not used in this mode.
(g) Serial channel start register m (SSm)... Sets only the bits of the target channel is 1.
Remark 1. m: Unit number (m = 0, 1), q: UART number (q = 1, 3)
Remark 2. : Setting disabled (set to the initial value)
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
1514131211109876543210
SOm
0 0 0 0
CKOm3
×
CKOm2
×
CKOm1
×
CKOm0
×
0 0 0 0
SOm3
×
SOm2
×
SOm1
×
SOm0
×
1514131211109876543210
SOEm
0 0 0 0 0 0 0 0 0 0 0 0
SOEm3
×
SOEm2
×
SOEm1
×
SOEm0
×
1514131211109876543210
SSm
0 0 0 0 0 0 0 0 0 0 0 0
SSm3
0/1
SSm2
×
SSm1
0/1
SSm0
×
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