Renesas RL78/G1H

RL78/G1H CHAPTER 18 RF TRANSCEIVER
R01UH0575EJ0120 Rev. 1.20 Page 629 of 920
Dec 22, 2016
(63) Preamble setting register (BBPABL)
This register is used to optionally set the preamble value. This register consists of 16 bits.
Set following values for each modification.
2FSK/2GFSK: 00AAH
4FSK/4GFSK: 00EEH
BBPABL register is read via serial interface in 8-bit units.
Reset signal generation sets this register to 00AAH.
Figure 18 - 76 Preamble Setting Register (BBPABL) Format
(64) SFD setting register (BBSFD)
This register is used to set the SFD value for FEC disabled frame transmission when MRFSKSFD bit is 0.
This register consists of 32 bits.
Set following values for each modification.
2FSK/2GFSK: 00007209H
4FSK/4GFSK: BFAEAAEBH
BBSFD register is read via serial interface in 8-bit units.
Reset signal generation sets this register to 00007209H.
Figure 18 - 77 SFD Setting Register (BBSFD) Format
Address:
00C1H, 00C0H
After reset:
00AAH
R/W
Symbol 15 14 13 12 11 10 9 8
BBPABL PABL15 PABL14 PABL13 PABL12 PABL11 PABL10 PABL9 PABL8
76543210
PABL7 PABL6 PABL5 PABL4 PABL3 PABL2 PABL1 PABL0
PABL[15:0] preamble value
Address:
00C5H to 00C2H
After reset:
00007209H
R/W
Symbol 31 30 29 28 27 26 25 24
BBSFD SFD31 SFD30 SFD29 SFD28 SFD27 SFD26 SFD25 SFD24
23 22 21 20 19 18 17 16
SFD23 SFD22 SFD21 SFD20 SFD19 SFD18 SFD17 SFD16
15 14 13 12 11 10 9 8
SFD15 SFD14 SFD13 SFD12 SFD11 SFD10 SFD9 SFD8
76543210
SFD7 SFD6 SFD5 SFD4 SFD3 SFD2 SFD1 SFD0
SFD[31:0] SFD value