Renesas RL78/G1H

RL78/G1H CHAPTER 18 RF TRANSCEIVER
R01UH0575EJ0120 Rev. 1.20 Page 630 of 920
Dec 22, 2016
(65) SHR control register (BBSHRCON)
This register is used to set the number of bytes in the preamble setting register to be used for the repetitive
pattern for preamble by using the number-of-preamble setting bit.
0: 1 byte (preamble setting register bits 7 to 0)
1: 2 byte (preamble setting register bits 15 to 0)
This register is used to set the number of bytes in the SFD setting register to be used for the SFD output
pattern by using the number-of-SFD setting bit.
00: 1 byte (SFD setting register bits 7 to 0)
01: 2 bytes (SFD setting register bits 15 to 0)
10: Prohibited
11: 4 bytes (SFD setting register bits 31 to 0)
The BBBSHRCON register consists of 8 bits and can be accessed (serial interface communication) in 8 bit
unit.
Reset signal generation sets this register to 02H.
Figure 18 - 78 SHR Control Register (BBSHRCON) Format
Caution Be sure to clear bits 3 to 7 to “0”.
Address:
00C6H
After reset:
02H
R/W
Symbol76543210
BBSHRCON 0 0 0 0 0 SFDBYTE1 SFDBYTE0 PABLBYTE
SFDBYTE1 SFDBYTE0 Number-of-SFD-byte setting bit
001 byte
012 byte
1 0 Setting disabled
1 1 4 bytes
PABLBYTE Number-of-preamble-byte setting bit
0 1 byte
1 2 byte