RL78/G1H CHAPTER 30 INSTRUCTION SET
R01UH0575EJ0120 Rev. 1.20 Page 841 of 920
Dec 22, 2016
Note 1. Number of CPU clocks (fCLK) when the internal RAM area, SFR area, or extended SFR area is accessed, or when no
data is accessed.
Note 2. Number of CPU clocks (f
CLK) when the code flash memory is accessed, or when the data flash memory is accessed by
an 8-bit instruction.
Note 3. Except rp = AX
Remark Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction from the
internal RAM area, the number becomes double number plus 3 clocks at a maximum.
Table 30 - 8 Operation List (4/18)
Instruction
Group
Mnemonic Operands Bytes
Clocks
Clocks
Flag
Note 1 Note 2
ZACCY
8-bit data
transfer
XCH A, [HL+B]
22—
A
←→
(HL + B)
A, ES:[HL+B]
33—
A
←→
((ES, HL) + B)
A, [HL+C]
22—
A
←→
(HL + C)
A, ES:[HL+C]
33—
A
←→
((ES, HL) + C)
ONEB A
11—
A
←
01H
X
11—
X
←
01H
B
11—
B
←
01H
C
11—
C
←
01H
!addr16
31—
(addr16)
←
01H
ES:!addr16
42—
(ES, addr16)
←
01H
saddr
21—
(saddr)
←
01H
CLRB A
11—
A
←
00H
X
11—
X
←
00H
B
11—
B
←
00H
C
11—
C
←
00H
!addr16
31—
(addr16)
←
00H
ES:!addr16
42—
(ES,addr16)
←
00H
saddr
21—
(saddr)
←
00H
MOVS [HL+byte], X
31—
(HL + byte)
←
X
××
ES:[HL+byte], X
42—
(ES, HL + byte)
←
X
××
16-bit data
transfer
MOVW rp, #word
31—
rp
←
word
saddrp, #word
41—
(saddrp)
←
word
sfrp, #word
41—
sfrp
←
word
AX, rp
Note 3
11—
AX
←
rp
rp, AX
Note 3
11—
rp
←
AX
AX, !addr16
314
AX
←
(addr16)
!addr16, AX
31—
(addr16)
←
AX
AX, ES:!addr16
425
AX
←
(ES, addr16)
ES:!addr16, AX
42—
(ES, addr16)
←
AX
AX, saddrp
21—
AX
←
(saddrp)
saddrp, AX
21—
(saddrp)
←
AX
AX, sfrp
21—
AX
←
sfrp
sfrp, AX
21—
sfrp
←
AX
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