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S:\Hp8960\E1962B CDMA 2000\Pi Release\Reference Guide\Chapters\cdma2000_gen_block_diagram.fm
Block Diagram
The Link Subsystem Digital board provide Layer 1 digital signal processing. There are several Field
Programmable Logic Arrays , which are programmed for different CDMA formats.
Analog To Digital Converter Module
Following the Measurement Downconverter and Demodulation Downconverter IF 1 is the Analog to Digital
Converter module. The purpose of the Analog to Digital Converter module is to convert the downconverted
analog signals into digital data streams which can be processed by the Digital Signal Processing module.
In order to maintain the radio link of non-CDMA formats, the downconversion path through the Demodulation
Downconverter module has a dedicated A/D conversion path.
In order to optimize measurement throughput, the fast RF power detector also has a single dedicated A/D
path. This allows power measurements, in many cases, to be made concurrently with other measurements.
The two outputs from the Measurement Downconverter module, and the Audio In signal share a single
multiplexed A/D path.
The outputs of the various analog to digital converters on the Analog to Digital Converter module share a
common data bus to the Digital Signal Processing module.
Digital Signal Processing Module
The Digital Signal Processing (DSP) module is responsible for a variety of tasks within the overall test set
architecture. These tasks are:
• demodulating data from the radio under test (data received from the Demodulation Downconverter module) and sending
the demodulated data bits to the Protocol Processor module
• for some systems, perform audio measurements using audio information sent to the DSP module from the Protocol
Processor module
• execute a variety of signal processing algorithms to perform measurements on the radio system of the currently loaded
TA (data received from the power detector ADC, the measurement ADC and, in some cases, data received from the
Demodulation Downconverter ADC)
The DSP processor communicates with the Host Processor and the Protocol Processor, as well as controlling
the configuration and synchronization of the Analog To Digital Converter module.
Protocol Processor Module
The Protocol Processor module is responsible for maintaining the radio link between the test set and the
mobile station under test. The primary tasks of the Protocol Processor module are:
• generating the protocol messaging necessary for the forward channel and sending that protocol stream to the test set’s RF
source for transmission to the mobile station
• decoding the protocol messaging received from the mobile station under test on the reverse channel
• computing measurement results which are associated with data bits contained within the mobile stations messaging, such
as bit error ratio
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