Ashida ADR233B - Page 427

ADR233B
Doc ID : ADR233B_IM_01
Ref ID : ADR233B/IM/FC
Rev No. : 05
Page No. : 427 of 479
9.11.4 Phase OC
9.11.4.1 W1 Phase OC (If Disabled)
W1 Phase OC
IP>1 Enable
Disabled
6
6 5
W1 Phase OC
IP
>2 Enable
Disabled
3 4
W1 Phase OC
IP
>3 Enable
Disabled
3 4
SAVE Settings
DISCARD Settings
4
Press 3 Key
For Save
Press Target Reset
Key For Cancel
Target Reset
3
PROTECTION
CLEAR RECORDS
OUTPUT & LED TEST
GROUP 1
4
Phase OC
W1 Phase OC
4
W2 Phase OC
6 5
REF
Phase OC
4
Ground OC
Residual OC
Note : The Phase OC settings of W2 Phase OC is similar to W1 Phase OC