Ashida ADR233B - Page 440

ADR233B
Doc ID : ADR233B_IM_01
Ref ID : ADR233B/IM/FC
Rev No. : 05
Page No. : 440 of 479
9.11.7.2 W1 Sequence OC ( IEC Curve )
W1 Sequence OC
Seq.I>1 Curve
IEC S Inverse
W1 Sequence OC
Seq.I>1
0.10 A
0.10 – 2.00 xIn
3 4
W1 Sequence OC
Seq.I>1 TMS
0.01
Range 0.01 – 1.5
3 4
3 4
W1 Sequence OC
t Seq.I>1 D/O Delay
0.01 s
Range 0 – 100s
3 4
3 4
3 4
W1 Sequence OC
Seq.I>1 D/O Char
DT
W1 Sequence OC
Seq.I>1 2H BLK
Enabled
W1 Sequence OC
Seq.I>1 UB2H
4.0 A
4.0 – 32.0 xIn
W1 Sequence OC
Seq.I>1 2H Thresh
5 %
Range 5 – 70%
3 4
SAVE Settings
DISCARD Settings
4
Target Reset
3
Press 3 Key
For Save
Press Target Reset
Key For Cancel
W1 Sequence OC
Seq.I>1 Enable
+Seq
6 5
Phase OC
Ground OC
Residual OC
Sequence OC
4
6
PROTECTION
CLEAR RECORDS
OUTPUT & LED TEST
GROUP 1
4
Sequence OC
W1 Sequence OC
4
W2 Sequence OC
6 5
6 5
Note : The W1 Sequence OC settings of Seq.I>2 Enable and Seq.I>3 Enable for all IEC Curves is
similar to W1 Sequence OC setting of Seq.I>1 Enable.
Note : The Sequence OC settings of W2 Sequence OC will be similar to that W1 Sequence OC.