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Avaya S8700
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TDM-CLK (TDM Bus Clock)
Issue 1 May 2002
8-1613555-233-143
65 FAIL The tone-clock is currently not able to lock on to the current synchronization
reference. If this tone-clock is in the master port networK:
1. Examine the error log for any DS1-BD, SYNC or other TDM-CLK errors
and resolve as applicable.
2. Run this test again via the test tone-clock UUC command.
3. Examine the DS1 measurements to determine whether the facility is
healthy.
4. Administer a new synchronization reference.
5. Replace the DS1 board currently supplying the reference.
If this tone-clock is in the slave port networK:
1. Examine the error log for any SYNC, EXP-INTF, or TDM-CLK errors.
2. Run this test again via the test tone-clock UUC command.
66 FAIL There is an on-board failure of TDM clock hardware.
1. Use test tone UUCSS long to resolve the problem. The long test resets
the board and is required to reload on-board RAM associated with the
TN2182s DSPs. The effect is that tone detectors are taken out of service
momentarily and tones are removed from the TDM bus for about 10
seconds. This means that no dial tone or touch tones are available during
this interval. It probably will not affect calls in progress, but could cause a
call origination to abort or a user will not get dial tone when going off hook.
2. If the test passes and the alarm does not resolve, retest (test tone UUCSS
long clear).
3. If the test passes, terminate the repair process. If it fails, replace the circuit
pack at the customers convenience.
PASS TDM bus Clock Circuit Status is sane. There are no clock-detection circuit
problems on the Tone-Clock circuit.
Table 8-625. Test #148 TDM bus Clock Circuit Status Inquiry Test Continued
Error
Code
Tes t
Result Description / Recommendation
Continued on next page

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