Avaya S8700 - Page 2334

Maintenance-Object Repair Procedures
555-233-143
8-1612 Issue 1 May 2002
TDM bus Clock Circuit Status Inquiry Test (#148)
The TDM bus Clock circuitry is checked for sanity. Any problems that are found
are reported via error codes
Table 8-625. Test #148 TDM bus Clock Circuit Status Inquiry Test
Error
Code
Tes t
Result Description / Recommendation
None,
1001
ABORT The system could not allocate the necessary resources for the test.
1. Wait 1-minute, and retry the test.
2000 ABORT Response to the test was not received within the allowable time period.
2100 ABORT System resources required to run this test are not available.
1. Retry the command at 1-minute intervals up to 5 times.
1 FAIL This error means the Tone-Clock circuit framing verification firmware reports an
error in the clock synchronization signal coming into this port network.
1. If the Tone-Clock circuit reporting the problem is a master clock, then the
system synchronization reference is providing a bad timing source. See
‘‘SYNC (Port-Network Synchronization)’’ on page 8-1509 or ‘‘STRAT-3
(Stratum-3 Clock)’’ on page 8-1496 to change the system synchronization
reference.
2. If the Tone-Clock circuit is a slave clock, then the EI to which it is listening
is providing a bad timing source. Follow the diagnostic procedures
specified for TDM-CLK Error Code 2305.
3. If no problem can be found with the incoming synchronization signal,
replace the IPSI or Tone-Clock circuit pack. See ‘‘Replacing the IPSI or
Tone-Clock Circuit Pack’’ on page 8-1666.
2 FAIL This error indicates that Tone-Clock circuit has inaccurately detected loss of
signal on the incoming synchronization timing source.
4, 8 FAIL The local oscillator on the Tone-Clock circuit has failed.
16, 32 FAIL The circuitry on the Tone-Clock circuit used to detect synchronization timing
errors has failed.
1. Errors 2, 4, 8, 16, and 32 indicate that there is poor synchronization
between port networks and external facilities. It may be noticeable to the
customer in the form of errors in data communications. The Tone-Clock
circuit is defective. See ‘‘Replacing the IPSI or Tone-Clock Circuit Pack’’
on page 8-1666.
64 FAIL This message is only sent when an uplink message has reported the loss of
valid synchronization timing information coming into this port network. It has
been reported in TDM-CLK Error Log entries; one or more of 1025, 1281, 1537,
2049 and 2305.
1. Resolve the errors indicated. No separate corrective action is required.
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