Intel Xeon User Manual

6 Design Guide
9.4.4 Plane Splits, Voids, and Cut-Outs (Anti-Etch)..................................125
9.4.4.1 VCC Plane Splits, Voids, and Cut-Outs (Anti-Etch)............125
9.4.4.2 GND Plane Splits, Voids, and Cut-Outs (Anti-Etch) ...........125
9.4.5 EMI Considerations..........................................................................125
9.4.6 USB Power Line Layout Topologies.................................................126
9.5 Intel
®
ICH3-S SMBus/SMLink Interface............................................................126
9.5.1 SMBus Design Considerations.........................................................127
9.5.2 General Design Note........................................................................127
9.5.3 The Unified VCC_CORE Architecture..............................................127
9.6 Real Time Clock (RTC).....................................................................................128
9.6.1 RTC External Circuit.........................................................................129
9.6.2 External Capacitors..........................................................................130
9.6.3 RTC Layout Considerations .............................................................131
9.6.4 RTC External Battery Connection ....................................................131
9.6.5 RTC External RTCRST# Circuit.......................................................132
9.6.6 VBIAS DC Voltage and Noise Measurements .................................132
9.6.7 SUSCLK...........................................................................................133
9.6.8 RTC-Well Input Strap Requirements................................................133
9.7 Internal LAN Layout Guidelines ........................................................................133
9.7.1 LCI (LAN Connect Interface) Guidelines..........................................135
9.7.1.1 Bus Topology......................................................................135
9.7.1.2 Signal Routing and Layout .................................................136
9.7.1.3 Crosstalk Consideration .....................................................136
9.7.1.4 Impedances ........................................................................136
9.7.1.5 Line Termination.................................................................136
9.7.2 General LAN Routing Guidelines and Considerations .....................137
9.7.2.1 General Trace Routing Considerations ..............................137
9.7.2.2 Trace Geometry and Length...............................................138
9.7.2.3 Signal Isolation ...................................................................138
9.7.2.4 Power and Ground Connections ........................................138
9.7.2.5 General Power and Ground Plane Consideration ..............139
9.7.2.6 Board Design......................................................................140
9.7.2.7 Common Physical Layout Issues .......................................140
9.7.3 Intel
®
82562ET/EM Guidelines ........................................................142
9.7.3.1 Guidelines for Intel
®
82562ET/EM Component Placement 142
9.7.3.2 Crystals and Oscillators......................................................142
9.7.3.3 Intel
®
82562ET/EM Termination Resistors.........................143
9.7.4 Critical Dimensions...........................................................................143
9.7.5 Terminating Unused Connections....................................................145
10 Debug Port................................................................................................................147
10.1 Logic Analyzer Interface (LAI)...........................................................................147
10.2 Mechanical Considerations...............................................................................147
10.3 Electrical Considerations...................................................................................147
11 EMI and Mechanical Design Considerations..............................................149
11.1 Introduction .......................................................................................................149
11.1.1 Brief EMI Theory ..............................................................................149
11.1.2 EMI Regulations and Certifications ..................................................150
11.2 EMI Design Considerations...............................................................................150
11.2.1 Spread Spectrum Clocking (SSC)....................................................150

Intel Xeon Specifications

General

Brand	Intel
Model	Xeon
Category	Processor
Language	English