Intel Xeon User Manual

Design Guide 7
11.2.2 Differential Clocking .........................................................................151
11.2.3 PCI Bus Clock Control......................................................................152
11.2.4 Heatsink Effects ...............................................................................153
11.2.5 EMI Ground Frames and Faraday Cages ........................................153
11.2.6 EMI Test Capabilities .......................................................................154
11.3 Retention Mechanism Placement and Keep-Outs ............................................155
11.3.1 Grounding Techniques.....................................................................157
12 Platform Power Delivery Guidelines ..............................................................159
12.1 Customer Reference Board Power Delivery .....................................................159
12.1.1 Processor Core Voltage ...................................................................161
12.1.2 2.5 V.................................................................................................161
12.1.3 1.25 V...............................................................................................161
12.1.4 1.8 V.................................................................................................161
12.1.5 1.2 V.................................................................................................161
12.1.6 5 VSB ...............................................................................................161
12.1.7 3.3 VSB ............................................................................................162
12.1.8 1.8 VSB ............................................................................................162
12.1.9 Power Summary...............................................................................162
12.2 Processor Power Distribution Guidelines..........................................................162
12.2.1 Processor Power Requirements.......................................................162
12.2.1.1 Multiple Voltages ................................................................162
12.2.1.2 Voltage Tolerance...............................................................163
12.2.2 Processor Current Requirements.....................................................163
12.2.3 Power Delivery Layout Requirements ..............................................163
12.2.4 Voltage Regulator Requirements .....................................................164
12.2.4.1 Input Voltages and Currents...............................................165
12.2.4.2 Power Good Output (PWRGD)...........................................165
12.2.4.3 Fault Protection...................................................................166
12.2.5 VR Module 9.1 Recommendations...................................................166
12.2.6 VR Down Recommendations ...........................................................167
12.2.7 Voltage Sequencing .........................................................................169
12.2.8 VCCA, VCCIOPLL, and VSSA Filter Specifications.........................171
12.2.9 Processor Decoupling ......................................................................173
12.2.9.1 High-Frequency Decoupling ...............................................173
12.2.9.2 Bulk Decoupling..................................................................175
12.2.10 GTLREF[3:0] ....................................................................................175
12.2.11 Component Models ..........................................................................177
12.2.12 Measuring Transients.......................................................................177
12.3 MCH Power Delivery Guidelines.......................................................................177
12.3.1 DDR_VTT (1.25 V) Decoupling ........................................................177
12.3.2 VCC_CPU (1.45 V Power Plane) .....................................................177
12.3.3 DDR (2.5 V Power Plane) ................................................................178
12.3.4 Hub Interface (1.2 V Power Plane)...................................................178
12.3.5 Filter Specifications (1.2V Power Plane) ..........................................179
12.3.6 MCH Power Sequencing Requirement ............................................180
12.4 Intel
®
ICH3-S Power Delivery Guidelines .........................................................181
12.4.1 1.8 V/3.3 V Power Sequencing ........................................................181
12.4.2 3.3V/V5REF Sequencing .................................................................182
12.4.3 Intel
®
ICH3-S Power Rails................................................................183
12.4.4 Intel
®
ICH3-S Decoupling Recommendations..................................183

Intel Xeon Specifications

General

Brand	Intel
Model	Xeon
Category	Processor
Language	English