dsPIC30F Family Reference Manual
DS70061C-page 14-10 © 2004 Microchip Technology Inc.
Figure 14-6: Dual Compare Mode
Figure 14-7: Dual Compare Mode: Single Output Pulse (OCxRS > PR2)
OCxIF
0000
3001 3002 3003 30043000
TMRy
4000
Cleared by User
Note 1: An ‘x’ represents the output compare channel number. A ‘y’ represents the time base number.
2: OCxR = Compare Register, OCxRS = Secondary Compare Register.
1 Instruction Clock Period
2 TCY
4000
3000
PRy
OCxR
3006
OCx pin
TMRy Resets Here
3003
OCxRS
3005
OCxIF
0000
3001 3002 3003 30043000
TMRy
4000
1 Instruction Clock Period
4000
3000
PRy
OCxR
3006
OCx pin
TMRy Resets Here
4100
OCxRS
3005
Note 1: An ‘x’ represents the output compare channel number. A ‘y’ represents the time base number.
2: OCxR = Compare Register, OCxRS = Secondary Compare Register.
Compare Interrupt does not occur
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