© 2004 Microchip Technology Inc. DS70061C-page 14-19
Section 14. Output Compare
Output
Compare
14
14.3.3.1 PWM with Fault Protection Input Pin
When the Output Compare mode bits, OCM<2:0> (OCxCON<2:0>), are set to ‘111’, the selected
output compare channel is configured for the PWM mode of operation. All functions described in
Section 14.3.3, “Pulse Width Modulation Mode” apply, with the addition of input Fault
protection.
Fault protection is provided via the OCFA and OCFB pins. The OCFA pin is associated with the
output compare channels 1 through 4, while the OCFB pin is associated with the output compare
channels 5 through 8.
If a logic ‘0’ is detected on the OCFA/OCFB pin, the selected PWM output pin(s) are placed in
the high impedance state. The user may elect to provide a pull-down or pull-up resistor on the
PWM pin to provide for a desired state if a Fault condition occurs. The shutdown of the PWM
output is immediate and is not tied to the device clock source. This state will remain until:
• The external Fault condition has been removed and
• The PWM mode is re-enabled by writing to the appropriate mode bits, OCM<2:0>
(OCxCON<2:0>).
As a result of the Fault condition, the respective interrupt flag, OCxIF bit, is asserted and an
interrupt will be generated, if enabled. Upon detection of the Fault condition, the OCFLT bit
(OCx-CON<4>) is asserted high (logic ‘1’). This bit is a read only bit and will only be cleared once
the external Fault condition has been removed and the PWM mode is re-enabled, by writing to
the appropriate mode bits, OCM<2:0> (OCxCON<2:0>).
14.3.3.2 PWM Period
The PWM period is specified by writing to PRy, the Timery period register. The PWM period can
be calculated using the following formula:
Equation 14-1: Calculating the PWM Period
Note: The external Fault pins, if enabled for use, will continue to control the OCx output
pins, while the device is in Sleep or Idle mode.
PWM Period = [(PRy) + 1] • TCY • (TMRy Prescale Value)
PWM Frequency = 1/[PWM Period]
Note: A PRy value of N will produce a PWM period of N + 1 time base count cycles. For
example: a value of 7 written into the PRy register will yield a period consisting of 8
time base cycles.