dsPIC30F Family Reference Manual
DS70068C-page 21-6 © 2004 Microchip Technology Inc.
21.2.2 Message Protocol
A typical I
2
C message is shown in Figure 21-4. In this example, the message will read a specified
byte from a 24LC256 I
2
C serial EEPROM. The dsPIC30F device will act as the master and the
24LC256 device will act as the slave.
Figure 21-4 indicates the data as driven by the master device and the data as driven by the slave
device, remembering that the combined SDA line is a wired-AND of the master and slave data.
The master device controls and sequences the protocol. The slave device will only drive the bus
at specifically determined times.
Figure 21-4: A Typical I
2
C Message: Read of Serial EEPROM (Random Address Mode)
21.2.2.1 Start Message
Each message is initiated with a “Start” condition and terminated with a “Stop” condition. The
number of the data bytes transferred between the Start and Stop conditions is determined by the
master device. As defined by the system protocol, the bytes of the message may have special
meaning such as “device address byte” or “data byte”.
21.2.2.2 Address Slave
In the figure, the first byte is the device address byte that must be the first part of any I
2
C
message. It contains a device address and a R/W
bit. Refer to “Section 26. Appendix” for
additional information on Address Byte formats. Note that R/W
= 0 for this first address byte,
indicating that the master will be a transmitter and the slave will be a receiver.
21.2.2.3 Slave Acknowledge
The receiving device is obliged to generate an Acknowledge signal, “ACK”, after the reception of
each byte. The master device must generate an extra SCL clock, which is associated with this
Acknowledge bit.
21.2.2.4 Master Transmit
The next 2 bytes, sent by the master to the slave, are data bytes containing the location of the
requested EEPROM data byte. The slave must Acknowledge each of the data bytes.
21.2.2.5 Repeated Start
At this point, the slave EEPROM has the address information necessary to return the requested
data byte to the master. However, the R/W
bit from the first device address byte specified master
transmission and slave reception. The bus must be turned in the other direction for the slave to
send data to the master.
To do this function without ending the message, the master sends a “Repeated Start”. The
Repeated Start is followed with a device address byte containing the same device address as
before and with the R/W
= 1 to indicate slave transmission and master reception.
X
Bus
Master
SDA
A
C
K
N
A
C
A
C
K
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
Address
Byte
EE ADDR
High Byte
EE ADDR
Low Byte
Address
Byte
Data
Byte
S
T
A
R
T
S 1010
AAA
0
210
R 1010
AAA
1
210
P
K
Slave
SDA
Activity
N
AAAA
E
R
R
/
W
R
/
W
Output
Output
I
D
L
E
I
D
L
E
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