dsPIC30F Family Reference Manual
DS70068C-page 21-42 © 2004 Microchip Technology Inc.
Figure 21-29: Slave Message (Write Data to Slave: 7-bit Address; Buffer Overrun; A10M = 0; GCEN = 0; IPMIEN = 0)
SCL (Master)
SDA (Master)
SCL (Slave)
SDA (Slave)
I2CRCV
RBF
SI2CIF
STREN
1 2 3 4 5 6 7 8
A1A0
9
A
D7D6D5D4D3D2D1D0
1 2 3 4 5 6 7 8 9
W
21
A
3 4 2
1
- Slave receives address byte. Address matches. Slave generates interrupt.
2
- Next received byte is message data. Byte moved to I2CRCV register, sets RBF.
6
- Software reads I2CRCV register. RBF bit clears.
7
- Software clears I2COV bit.
Address byte not moved to I2CRCV register.
Slave generates interrupt. Slave Acknowledges reception.
A6A5A4A3A2
S
P
I2COV
R_W
D_A
D7D6D5D4D3D2D1D0
1 2 3 4 5 6 7 8 9
N
D7D6D5D4D3D2D1D0
1 2 3 4 5 6 7 8 9
D7D6D5D4D3D2D1D0
1 2 3 4 5 6 7 8 9
SCLREL
5 5
3
- Next byte received before I2CRCV read by software. I2CRCV register unchanged.
I2COV overflow bit set. Slave generates interrupt. Slave sends NACK for reception.
N
A
6
4
- Next byte also received before I2CRCV read by software.
Slave sends NACK for reception.
I2CRCV register unchanged. Slave generates interrupt.
SI2CIF cleared by user software.