Renesas RL78/G1H User Manual

RL78/G1H CHAPTER 7 TIMER ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 157 of 920
Dec 22, 2016
Figure 7 - 14 Format of Timer mode register mn (TMRmn) (3/4)
Note Bit 11 is fixed at 0 of read only, write is ignored.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)
Address: F0190H, F0191H (TMR00) to F0196H, F0197H (TMR03), After reset: 0000H R/W
F01D0H, F01D1H (TMR10) to F01D6H, F01D7H (TMR13)
Symbol1514131211109876543210
TMRmn
(n = 2)
CKS
mn1
CKS
mn0
0
CCS
mn
MAST
ERmn
STS
mn2
STS
mn1
STS
mn0
CIS
mn1
CIS
mn0
00
MD
mn3
MD
mn2
MD
mn1
MD
mn0
Symbol1514131211109876543210
TMRmn
(n = 1, 3)
CKS
mn1
CKS
mn0
0
CCS
mn
SPLIT
mn
STS
mn2
STS
mn1
STS
mn0
CIS
mn1
CIS
mn0
00
MD
mn3
MD
mn2
MD
mn1
MD
mn0
Symbol1514131211109876543210
TMRmn
(n = 0)
CKS
mn1
CKS
mn0
0
CCS
mn
0
NoteNot
e
STS
mn2
STS
mn1
STS
mn0
CIS
mn1
CIS
mn0
00
MD
mn3
MD
mn2
MD
mn1
MD
mn0
CIS
mn1
CIS
mn0
Selection of TImn pin input valid edge
0 0 Falling edge
0 1 Rising edge
1 0 Both edges (when low-level width is measured)
Start trigger: Falling edge, Capture trigger: Rising edge
1 1 Both edges (when high-level width is measured)
Start trigger: Rising edge, Capture trigger: Falling edge
If both the edges are specified when the value of the STSmn2 to STSmn0 bits is other than 010B, set the CISmn1 to
CISmn0 bits to 10B.

Renesas RL78/G1H Specifications

General

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English