Renesas RL78/G1H User Manual

RL78/G1H CHAPTER 7 TIMER ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 218 of 920
Dec 22, 2016
Figure 7 - 65 Example of Set Contents of Registers When PWM Function (Master Channel) Is Used
(a) Timer mode register mn (TMRmn)
(b) Timer output register m (TOm)
(c) Timer output enable register m (TOEm)
(d) Timer output level register m (TOLm)
(e) Timer output mode register m (TOMm)
Note TMRm2: MASTERmn = 1
TMRm0: Fixed to 0
Remark m: Unit number (m = 0), n: Master channel number (n = 0, 2)
1514131211109876543210
TMRmn
CKSmn1
1/0
CKSmn0
00
CCSmn
0
MAS
TERmn
Note
1
STSmn2
0
STSmn1
0
STSmn0
0
CISmn1
0
CISmn0
000
MDmn3
0
MDmn2
0
MDmn1
0
MDmn0
1
Operation mode of channel n
000B: Interval timer
Setting of operation when
counting is started
1: Generates INTTMmn
when counting is started.
Selection of TImn pin input edge
00B: Sets 00B because these are not used.
Start trigger selection
000B: Selects only software start.
Setting of the MASTERmn bit (channel 2)
1: Master channel.
Count clock selection
0: Selects operation clock (f
MCK).
Operation clock (f
MCK) selection
00B: Selects CKm0 as operation clock of channel n.
10B: Selects CKm1 as operation clock of channel n.
Bit n
TOm
TOmn
0
0: Outputs 0 from TOmn.
Bit n
TOEm
TOEmn
0
0: Stops the TOmn output operation by counting operation.
Bit n
TOLm
TOLmn
0
0: Cleared to 0 when master channel output mode (TOMmn = 0)
Bit n
TOMm
TOMmn
0
0: Sets master channel output mode.

Renesas RL78/G1H Specifications

General

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English