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RL78/G1H CHAPTER 4 CPU ARCHITECTURE

R01UH0575EJ0120 Rev. 1.20 Page 57 of 920

Dec 22, 2016

Note 1. These values vary depending on the reset source.

Note 2. The reset value of the WDTE register is determined by the setting of the option byte.

Table 4 - 8 Special Function Register (SFR) List (4/5)

Address

Special Function Register (SFR)

Name

Symbol R/W

Manipulable Bit Range

After Reset

1-bit 8-bit 16-bit

FFFA8H Reset control flag register RESF

—

√ —

Undefined

Note 1

FFFA9H Voltage detection register LVIM

R/W

√√—

00H

Note 1

FFFAAH Voltage detection level register LVIS

R/W

√√—

00H/01H/81H

Note 1

FFFABH Watchdog timer enable register WDTE

R/W

— √ —

9AH/1AH

Note 2

FFFACH CRC input register CRCIN R/W — √ —00H

FFFD0H Interrupt request flag register 2L IF2L IF2 R/W

√√√ 00H

FFFD1H Interrupt request flag register 2H IF2H R/W

√√ 00H

FFFD4H Interrupt mask flag register 2L MK2L MK2 R/W

√√√ FFH

FFFD5H Interrupt mask flag register 2H MK2H R/W

√√ FFH

FFFD8H Priority specification flag register 02L PR02L PR02 R/W

√√√ FFH

FFFD9H Priority specification flag register 02H PR02H R/W

√√ FFH

FFFDCH Priority specification flag register 12L PR12L PR12 R/W

√√√ FFH

FFFDDH Priority specification flag register 12H PR12H R/W

√√ FFH

Reset Source

RESET

Input

Reset by

POR

Reset by

Execution of

Illegal Instruction

Reset by

WDT

Reset by RAM

parity error

Reset by illegal-

memory access

Reset by

LVD

RESF TRAP Cleared (0) Set (1) Held Held

WDTRF Held Set (1) Held

RPERF Held Set (1) Held

IAWRF Held Set (1)

LVIRF Held Set (1)

LVIM LVISEN Cleared (0) Held

LVIOMSK Held

LVIF

LVIS Cleared (00H/01H/81H)

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English

Renesas RL78/G1H User Manual

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