RL78/G1H CHAPTER 4 CPU ARCHITECTURE
R01UH0575EJ0120 Rev. 1.20 Page 58 of 920
Dec 22, 2016
Remark For extended SFRs (2
nd
SFRs), see Tables 4 - 10 to 4 - 16 Extended SFR (2
nd
SFR) List.
Table 4 - 9 Special Function Register (SFR) List (5/5)
Address Special Function Register (SFR) Name Symbol R/W
Manipulable Bit Range
After Reset
1-bit 8-bit 16-bit
FFFE0H Interrupt request flag register 0L IF0L IF0 R/W
√√√00H
FFFE1H Interrupt request flag register 0H IF0H R/W
√√ 00H
FFFE2H Interrupt request flag register 1L IF1L IF1 R/W
√√√00H
FFFE3H Interrupt request flag register 1H IF1H R/W
√√ 00H
FFFE4H Interrupt mask flag register 0 MK0L MK0 R/W
√√√FFH
FFFE5H MK0H R/W
√√ FFH
FFFE6H Interrupt mask flag register 1 MK1L MK1 R/W
√√√FFH
FFFE7H MK1H R/W
√√ FFH
FFFE8H Priority specification flag register 00 PR00L PR00 R/W
√√√FFH
FFFE9H PR00H R/W
√√ FFH
FFFEAH Priority specification flag register 01 PR01L PR01 R/W
√√√FFH
FFFEBH PR01H R/W
√√ FFH
FFFECH Priority specification flag register 10 PR10L PR10 R/W
√√√FFH
FFFEDH PR10H R/W
√√ FFH
FFFEEH Priority specification flag register 11 PR11L PR11 R/W
√√√FFH
FFFEFH PR11H R/W
√√ FFH
FFFF0H Multiply and accumulation register (L) MACRL R/W — —
√ 0000H
FFFF1H
FFFF2H Multiply and accumulation register (H) MACRH R/W — —
√ 0000H
FFFF3H
FFFFEH Processor mode control register PMC R/W
√√—00H
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