4.31
Date Code 20080213 Instruction Manual SEL-351A Relay
Loss-of-Potential, Load Encroachment, and Directional Element Logic
Directional Control for Negative-Sequence and Phase Overcurrent Elements (Not in SEL-351A-1)
Note that Figure 4.6 has extra internal enable 32QGE, which is used in the
directional element logic that controls the neutral-ground and residual-ground
overcurrent elements (see Figure 4.4).
The settings involved with internal enable 32QE in Figure 4.6 (e.g., settings
a2, k2) are explained in Directional Control Settings (Not in SEL-351A-1) on
page 4.38.
Directional Elements
Refer to Figure 4.19, Figure 4.20, and Figure 4.21.
If enable setting ELOP = Y or Y1 and a loss-of-potential condition occurs
(Relay Word bit LOP asserts), the negative-sequence voltage-polarized and
positive-sequence voltage-polarized directional elements are disabled (see
Figure 4.6 and Figure 4.21).
Refer to Figure 4.1 and accompanying text for more information on loss-of-
potential.
Note in Figure 4.19 and Figure 4.21, that the assertion of internal enable
32QE (for the negative-sequence voltage-polarized directional element)
disables the positive-sequence voltage-polarized directional element. The
negative-sequence voltage-polarized directional element has priority over the
positive-sequence voltage-polarized directional elements in controlling the
phase overcurrent elements. The negative-sequence voltage-polarized
directional element operates for unbalanced faults while the positive-sequence
voltage-polarized directional element operates for three-phase faults.
Note also in Figure 4.21 that the assertion of ZLOAD disables the positive-
sequence voltage-polarized directional element. ZLOAD asserts when the
relay is operating in a user-defined load region (see Figure 4.2).
Directional Element
Routing
Refer to Figure 4.19 and Figure 4.22.
The directional element outputs are routed to the forward (Relay Word bits
32QF and 32PF) and reverse (Relay Word bits 32QR and 32PR) logic points
and then on to the direction forward/reverse logic in Figure 4.23 and
Figure 4.24.
Loss-of-Potential
Note if both the following are true:
➤ Enable setting ELOP = Y
➤ A loss-of-potential condition occurs (Relay Word bit LOP
asserts)
then the forward logic points (Relay Word bits 32QF and 32PF) assert to
logical 1, thus, enabling the negative-sequence and phase overcurrent
elements that are set direction forward (with settings DIR1 = F, DIR2 = F,
etc.). These direction-forward overcurrent elements effectively become
nondirectional and provide overcurrent protection during a loss-of-potential
condition.
As detailed previously (in Figure 4.6 and Figure 4.21), voltage-based
directional elements are disabled during a loss-of-potential condition. Thus,
the overcurrent elements controlled by these voltage-based directional
elements are also disabled. But this disable condition is overridden for the
overcurrent elements set direction forward if setting ELOP = Y.
Courtesy of NationalSwitchgear.com
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