Schweitzer Engineering Laboratories SEL-351A - Synchrophasor Relay Word Bits; Table L.7 Time Synchronization Relay Word Bits

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L.11

Date Code 20080213 Instruction Manual SEL-351A Relay

SEL Synchrophasors

Synchrophasor Relay Word Bits

The Time Synchronization Relay Word bits in Table L.7 indicate the present

status of the timekeeping function of the SEL-351A. See IRIG-B on

page 10.2.

Table L.7 Time Synchronization Relay Word Bits

Name Description

TIRIG Asserts while relay time is based on IRIG-B time source.

TSOK Time Synchronization OK. Asserts while time accuracy is of sufficient accu-

racy for synchrophasor measurement and satisfies TS_TYPE requirements.

PMDOK Phasor Measurement Data OK. Asserts when the SEL-351A is enabled, syn-

chrophasors are enabled (Global setting EPMU = Y), and TSOK is asserted.

Courtesy of NationalSwitchgear.com

Main Page

Default Chapter3
- Table of Contents3
List of Tables7
List of Figures11
Preface17
Section 1: Introduction and Specifications17
- Overview17
- SEL-351A Models22
- Table 1.1 SEL-351A Models22
- Table 1.2 SEL-351A-1 Models22
- Table 1.3 Major Differences-SEL-351, SEL-351A, and SEL-351A-123
- Applications26
- Figure 1.1 SEL-351A Relays Applied Throughout the Power System26
- Hardware Connection Features27
- Figure 1.2 SEL-351A Inputs, Outputs, and Communications Ports28
- Communications Connections29
- Figure 1.3 SEL-351A Communications Connections Examples29
- Specifications30
Section 2: Installation35
- Overview35
- Relay Mounting36
- Figure 2.1 SEL-351A Dimensions for Rack-Mount and Panel-Mount Models37
- Front-Panel and Rear-Panel Connection Diagrams38
- Figure 2.2 SEL-351A Rear-Panel Diagram-Conventional Terminal Blocks, Horizontal Example39
- Figure 2.3 SEL-351A Front-Panel Drawings (Rack Mount Relays)40
- Figure 2.4 SEL-351A Front-Panel Drawings (Panel-Mount Relays)41
- Figure 2.5 SEL-351A Front-Panel Drawing (Vertical Panel-Mount Relay, Model 0351A0X41) and Rear-Panel Drawing (Vertical Relay, Conventional Terminal Blocks, Model 0351A0041)42
- Figure 2.6 SEL-351A Rear-Panel Drawings-Connectorized Models 0351A0WH, 0351A0W3, or 0351A0W5 (Horizontal) and 0351A0W4 (Vertical)43
- Making Rear-Panel Connections44
- Figure 2.7 SEL-351A Plug-In Connector Coding (Top View; Model 0351A0W)45
- Figure 2.8 Broken-Delta Secondary Connection to Voltage Input VS, Wye-Connected Pts50
- Figure 2.10 Broken-Delta Secondary Connection to Voltage Input VS, Open-Delta Connected Pts51
- Figure 2.9 Resultant Voltage V S52
- Figure 2.11 Resultant Voltage52
- Table 2.1 Communications Cables to Connect the SEL-351A to Other Devices53
- SEL-351A AC/DC Connection Diagrams for Various Applications54
- Figure 2.12 SEL-351A Provides Overcurrent Protection and Reclosing for a Utility Distribution Feeder (Includes Fast Bus Trip Scheme) (Wye-Connected Pts)54
- Figure 2.13 SEL-351A Provides Overcurrent Protection for a Distribution Bus (Includes Fast Bus Trip Scheme) (Wye-Connected Pts)55
- Figure 2.14 SEL-351A Provides Directional Overcurrent Protection and Reclosing for a Transmission Line (Wye-Connected Pts)56
- Figure 2.16 SEL-351A Provides Overcurrent Protection for a Delta-Wye Transformer Bank (Wye-Connected Pts)58
- Figure 2.17 SEL-351A Provides Overcurrent Protection for a Transformer Bank with a Tertiary Winding (Wye-Connected Pts)59
- Figure 2.18 SEL-351A Provides Overcurrent Protection for an Industrial Distribution Feeder (Core-Balance Current Transformer Connected to Channel IN)60
- Figure 2.19 SEL-351A Provides Dedicated Breaker Failure Protection61
- Figure 2.20 SEL-351A Provides Overcurrent Protection for a High-Impedance or Low-Impedance Grounded System (Wye-Connected Pts)62
- Figure 2.21 SEL-351A Provides Overcurrent Protection for a Petersen Coil Grounded System (Wye-Connected Pts)63
- Figure 2.22 SEL-351A Provides Overcurrent Protection for an Ungrounded System (Wye-Connected Pts)64
- Figure 2.23 SEL-351A Provides Overcurrent Protection for an Ungrounded System (Open-Delta Connected Pts, Broken-Delta 3V0 Connection)65
- Figure 2.24 SEL-351A Provides Overcurrent Protection and Reclosing for a Utility Distribution Feeder (Open-Delta Connected Pts and Line-To-Ground Synchronism-Check Connection)66
- Figure 2.25 SEL-351A Provides Underfrequency Load Shedding, Overcurrent Protection, and Reclosing for a Utility Distribution Feeder (Single Voltage Connection)67
- Circuit Board Connections68
- Figure 2.26 Jumper, Connector, and Major Component Locations on the SEL-351A Main Board69
- Table 2.2 Output Contact Jumpers and Corresponding Output Contacts70
- Table 2.3 "Extra Alarm" Output Contacts and Corresponding Controlling Jumpers70
- Table 2.4 Required Position of Jumper JMP23 for Desired Output Contact OUT107 Operation70
- Table 2.5 Password and Breaker Jumper Positions for Standard Relay Shipments71
- Table 2.6 Password and Breaker Jumper Operation71
- Table 2.7 EIA-232 Serial Port Voltage Jumper Positions for Standard Relay Shipments71
- Figure 3.1 Levels 1 through 4 Phase Instantaneous Overcurrent Elements74
- Figure 3.2 Levels 5 through 6 Phase Instantaneous Overcurrent Elements74
- Figure 3.3 Levels 1 through 4 Phase Instantaneous/Definite-Time Overcurrent Elements (with Directional Control Option) (Not in SEL-351A-1)76
Section 3: Overcurrent, Voltage, Synchronism Check, and Frequency Elements Instantaneous/Definite-Time Overcurrent Elements78
- Figure 3.4 Combined Single-Phase Instantaneous Overcurrent Elements78
- Figure 3.5 SEL-351A Nondirectional Instantaneous Overcurrent Element Pickup Time Curve79
- Figure 3.6 SEL-351A Nondirectional Instantaneous Overcurrent Element Reset Time Curve79
- Figure 3.7 Levels 1 through 4 Phase-To-Phase Instantaneous Overcurrent Elements81
- Figure 3.8 Levels 1 through 4 Neutral-Ground Instantaneous Overcurrent Elements (with Directional Control and Definite-Time Elements in SEL-351A)82
- Figure 3.9 Levels 5 through 6 Neutral-Ground Instantaneous Overcurrent Elements82
- Figure 3.10 Levels 1 through 4 Residual-Ground Instantaneous Overcurrent Elements (with Directional Control and Definite-Time Elements in SEL-351A)84
- Figure 3.11 Levels 5 through 6 Residual-Ground Instantaneous Overcurrent Elements84
- Figure 3.12 Levels 1 through 4 Negative-Sequence Instantaneous Overcurrent Elements (with Directional Control and Definite-Time Elements in SEL-351A)87
- Figure 3.13 Levels 5 through 6 Negative-Sequence Instantaneous Overcurrent Elements87
- Table 3.1 Available Phase Time-Overcurrent Elements88
- Table 3.2 Phase Time-Overcurrent Element (Maximum Phase) Settings88
- Time-Overcurrent Elements88
- Table 3.3 Phase Time-Overcurrent Element (Maximum Phase) Logic Outputs89
- Figure 3.15 A-Phase Time-Overcurrent Element 51AT (with Directional Control Option in SEL-351A)93
- Figure 3.16 B-Phase Time-Overcurrent Element 51BT (with Directional Control Option in SEL-351A)93
- Figure 3.17 C-Phase Time-Overcurrent Element 51CT (with Directional Control Option in SEL-351A)94
- Figure 3.18 Neutral-Ground Time-Overcurrent Element 51NT (with Directional Control Option in SEL-351A)94
- Table 3.4 Neutral-Ground Time-Overcurrent Element Settings95
- Figure 3.19 Residual-Ground Time-Overcurrent Element 51GT (with Directional Control Option in SEL-351A)96
- Table 3.5 Available Residual-Ground Time-Overcurrent Elements96
- Table 3.6 Residual-Ground Time-Overcurrent Element 51GT Settings96
- Figure 3.20 Residual-Ground Time-Overcurrent Element 51G2T (with Directional Control Option)97
- Table 3.7 Residual-Ground Time-Overcurrent Element 51G2T Settings97
- Figure 3.21 Negative-Sequence Time-Overcurrent Element 51QT (with Directional Control Option in SEL-351A)98
- Table 3.8 Negative-Sequence Time-Overcurrent Element Settings99
- Table 3.10 Voltage Elements Settings and Settings Ranges (Wye-Connected Pts)100
- Table 3.9 Voltage Values Used by Voltage Elements100
- Voltage Elements100
- Table 3.11 Voltage Elements Settings and Settings Ranges (VS Channel)101
- Table 3.12 Voltage Elements Settings and Settings Ranges (Delta-Connected Pts)101
- Figure 3.22 Single-Phase and Three-Phase Voltage Elements (Wye-Connected Pts)103
- Figure 3.23 Phase-To-Phase and Sequence Voltage Elements (Wye-Connected Pts)104
- Figure 3.24 Phase-To-Phase Voltage Elements (Delta-Connected Pts)105
- Figure 3.25 Sequence Voltage Elements (Delta-Connected Pts)105
- Figure 3.26 Channel VS Voltage Elements (Wye- or Delta-Connected Pts)106
- Synchronism Check Elements (Not in SEL-351A-1)108
- Table 3.13 Synchronism Check Elements Settings and Settings Ranges108
- Figure 3.27 Synchronism Check Voltage Window and Slip Frequency Elements110
- Figure 3.28 Synchronism Check Elements111
- Figure 3.29 Angle Difference between V117
- Figure 3.30 Undervoltage Block for Frequency Elements (Group Setting VNOM ≠ OFF)121
- Frequency Elements121
- Figure 3.32 Levels 1 through 6 Frequency Elements122
- Table 3.14 Frequency Elements Settings and Settings Ranges123
- Figure 4.1 Loss-Of-Potential Logic127
Section 4: Loss-Of-Potential, Load Encroachment, and Directional Element Logic Loss-Of-Potential Logic (Not in the SEL-351A-1)128
- Load-Encroachment Logic (Not in SEL-351A-1)130
- Figure 4.2 Load-Encroachment Logic130
- Figure 4.3 Migration of Apparent Positive-Sequence Impedance for a Fault Condition133
- Directional Control for Neutral-Ground and Residual-Ground Overcurrent Elements (Not in SEL-351A-1)135
- Figure 4.4 General Logic Flow of Directional Control for Neutral-Ground and Residual-Ground Overcurrent Elements (Excluding Ungrounded/High-Impedance Grounded Systems)136
- Table 4.1 Available Ground Directional Elements137
- Figure 4.5 General Logic Flow of Directional Control for Neutral-Ground and Residual-Ground Overcurrent Elements (Ungrounded/High-Impedance Grounded Systems; ORDER137
- Table 4.2 Best Choice Ground Directional Element™ Logic138
- Table 4.3 Ground Directional Element Availability by Voltage Connection Settings139
- Figure 4.6 Internal Enables (32QE and 32QGE) Logic for Negative-Sequence Voltage-Polarized Directional Elements144
- Figure 4.7 Internal Enables (32VE and 32IE) Logic for Zero-Sequence Voltage-Polarized and Channel in Current-Polarized Directional Elements145
- Figure 4.8 Internal Enable (32NE) Logic for Zero-Sequence Voltage-Polarized Directional Elements (Low-Impedance Grounded, Petersen Coil Grounded, and Ungrounded/High-Impedance Grounded Systems)146
- Figure 4.9 Negative-Sequence Voltage-Polarized Directional Element for Neutral-Ground and Residual-Ground Overcurrent Elements147
- Figure 4.10 Zero-Sequence Voltage-Polarized Directional Element148
- Figure 4.11 Channel in Current-Polarized Directional Element149
- Figure 4.12 Zero-Sequence Voltage-Polarized Directional Element (Low-Impedance Grounded Systems)150
- Figure 4.13 Wattmetric and Incremental Conductance Directional Elements (Petersen Coil Grounded Systems)151
- Figure 4.14 Zero-Sequence Voltage-Polarized Directional Element (Ungrounded/High-Impedance Grounded Systems)152
- Figure 4.15 Routing of Directional Elements to Residual-Ground Overcurrent Elements153
- Figure 4.16 Routing of Direction Elements to Neutral-Ground Overcurrent Elements153
- Figure 4.17 Direction Forward/Reverse Logic for Residual-Ground Overcurrent Elements154
- Figure 4.18 Direction Forward/Reverse Logic for Neutral-Ground Overcurrent Elements155
- Directional Control for Negative-Sequence and Phase Overcurrent Elements (Not in SEL-351A-1)156
- Figure 4.19 General Logic Flow of Directional Control for Negative-Sequence and Phase Overcurrent Elements156
- Figure 4.20 Negative-Sequence Voltage-Polarized Directional Element for Negative-Sequence and Phase Overcurrent Elements159
- Figure 4.21 Positive-Sequence Voltage-Polarized Directional Element for Phase Overcurrent Elements160
- Figure 4.22 Routing of Directional Elements to Negative-Sequence and Phase Overcurrent Elements161
- Figure 4.23 Direction Forward/Reverse Logic for Negative-Sequence Overcurrent Elements162
- Figure 4.24 Direction Forward/Reverse Logic for Phase Overcurrent Elements163
- Directional Control Settings (Not in SEL-351A-1)164
- Table 4.4 Overcurrent Elements Controlled by Level Direction Settings DIR1-DIR4 (Corresponding Overcurrent Element Figure Numbers in Parentheses)165
- Figure 4.25 Zero-Sequence Impedance Network and Relay Polarity173
- Figure 4.26 Zero-Sequence Impedance Plot for Solidly-Grounded, Mostly Inductive System173
- Figure 4.27 Zero-Sequence Impedance Network for Ground Fault on Feeder177
- Figure 4.28 Wattmetric Element Operation for Ground Fault on Feeder178
- Table 4.5 Affect of Global Settings VSCONN and PTCONN on Petersen Coil Directional Elements181
- Directional Control Provided by Torque Control Settings (Not in SEL-351A-1)183
Section 5: Trip and Target Logic Trip Logic186
- Figure 5.1 Trip Logic186
- Figure 5.2 Minimum Trip Duration Timer Operation (See Bottom of Figure 5.1)187
- Figure 5.3 Three-Pole Open Logic (Top) and Switch-Onto-Fault Logic (Bottom)191
- Switch-Onto-Fault (SOTF) Trip Logic191
- Front-Panel Target LEDS194
- Table 5.1 SEL-351A Front-Panel Target LED Definitions194
- Figure 5.4 Seal-In of Breaker Failure Occurrence for Message Display197
Section 6: Close and Reclose Logic199
- Overview199
- Close Logic200
- Figure 6.1 Close Logic200
- Reclose Supervision Logic203
- Figure 6.2 Reclose Supervision Logic (Following Open Interval Time-Out)203
- Figure 6.3 Reclose Supervision Limit Timer Operation (Refer to Bottom of Figure 6.2)204
- Figure 6.4 SEL-351A Relays Installed at both Ends of a Transmission Line in a High-Speed Reclose Scheme207
- Reclosing Relay210
- Table 6.1 Relay Word Bit and Front-Panel Correspondence to Reclosing Relay States211
- Figure 6.5 Reclosing Relay States and General Operation211
- Table 6.2 Reclosing Relay Timer Settings and Setting Ranges213
- Figure 6.6 Reclosing Sequence from Reset to Lockout with Example Settings214
- Table 6.3 Shot Counter Correspondence to Relay Word Bits and Open Interval Times216
- Table 6.4 Reclosing Relay SEL OGIC Control Equation Settings217
- Table 6.5 Example Open Interval Time Settings222
- Figure 6.7 Reclose Blocking for Islanded Generator222
- Figure 6.8 Sequence Coordination between the SEL-351A and a Line Recloser225
- Figure 6.9 Operation of SEL-351A Shot Counter for Sequence Coordination225
Section 7: Inputs, Outputs, Timers, and Othercontrol Logic229
- Overview229
- Optoisolated Inputs230
- Figure 7.1 Example Operation of Optoisolated Inputs IN101-IN106230
- Figure 7.2 Circuit Breaker Auxiliary Contact and Reclose Enable Switch Connected to Optoisolated Inputs IN101 and IN102231
- Local Control Switches (Only on Models with LCD)233
- Table 7.1 Correspondence between Local Control Switch Positions and Label Settings233
- Figure 7.3 Local Control Switches Drive Local Bits LB1-LB16233
- Table 7.2 Correspondence between Local Control Switch Types and Required Label Settings234
- Figure 7.4 Local Control Switch Configured as an ON/OFF Switch234
- Figure 7.5 Local Control Switch Configured as an OFF/MOMENTARY Switch234
- Figure 7.6 Local Control Switch Configured as an ON/OFF/MOMENTARY Switch234
- Figure 7.7 Configured Manual Trip Switch Drives Local Bit LB3235
- Figure 7.8 Configured Manual Close Switch Drives Local Bit LB4235
- Remote Control Switches237
- Figure 7.9 Remote Control Switches Drive Remote Bits RB1-RB16237
- Latch Control Switches239
- Figure 7.10 Traditional Latching Relay239
- Figure 7.11 Latch Control Switches Drive Latch Bits LT1-LT16239
- Figure 7.12 SCADA Contact Pulses Input IN104 to Enable/Disable Reclosing Relay240
- Figure 7.13 Latch Control Switch Controlled by a Single Input to Enable/Disable Reclosing240
- Figure 7.14 Latch Control Switch Operation Time Line242
- Figure 7.15 Time Line for Reset of Latch Bit LT2 after Active Setting Group Change243
- Figure 7.16 Latch Control Switch (with Time Delay Feedback) Controlled by a Single Input to Enable/Disable Reclosing244
- Figure 7.17 Latch Control Switch (with Time Delay Feedback) Operation Time Line245
- Multiple Setting Groups246
- Table 7.3 Definitions for Active Setting Group Indication Relay Word Bits SG1 through SG6246
- Table 7.4 Definitions for Active Setting Group Switching246
- Table 7.5 SEL OGIC Control Equation Settings for Switching Active Setting Group between Setting Groups 1 and248
- Figure 7.18 SCADA Contact Pulses Input IN105 to Switch Active Setting Group between Setting Groups 1 and248
- Figure 7.19 SEL OGIC Control Equation Variable Timer SV8T Used in Setting Group Switching248
- Table 7.6 Active Setting Group Switching Input Logic250
- Figure 7.20 Active Setting Group Switching (with Single Input) Time Line250
- Figure 7.21 Rotating Selector Switch Connected to Inputs IN101, IN102, and IN103 for Active Setting Group Switching251
- Figure 7.22 Active Setting Group Switching (with Rotating Selector Switch) Time Line253
- SEL OGIC Control Equation Variables/Timers255
- Figure 7.25 Dedicated Breaker Failure Scheme Created with SEL Control Equation Variables/Timers257
- Output Contacts259
- Figure 7.26 Logic Flow for Example Output Contact Operation261
- Rotating Default Display (Only on Models with LCD)262
- Figure 7.27 Traditional Panel Light Installations262
- Figure 7.28 Rotating Default Display Replaces Traditional Panel Light Installations263
- Table 7.8 Mnemonic Settings for Metering on the Rotating Default Display269
Section 8: Breaker Monitor and Metering272
- Table 7.9 Mnemonic Settings for Breaker Wear Monitor Values on the Rotating Default Display273
Section 9: Setting the Relay311
- Overview311
- Table 9.1 Serial Port SET Commands311
- Settings Changes Via the Front Panel (Only on Models with LCD)312
- Settings Changes Via the Serial Port312
- Table 9.2 Set Command Editing Keystrokes312
- Time-Overcurrent Curves314
- Table 9.3 Equations Associated with U.S. Curves314
- Table 9.4 Equations Associated with IEC Curves314
- Figure 9.1 U.S. Moderately Inverse Curve: U1316
- Figure 9.2 U.S. Inverse Curve: U2317
- Figure 9.3 U.S. very Inverse Curve: U3318
- Figure 9.4 U.S. Extremely Inverse Curve: U4319
- Figure 9.5 U.S. Short-Time Inverse Curve: U5320
- Figure 9.6 I.E.C. Class a Curve (Standard Inverse): C1321
- Figure 9.7 I.E.C. Class B Curve (very Inverse): C2322
- Figure 9.8 I.E.C. Class C Curve (Extremely Inverse): C3323
- Figure 9.9 I.E.C. Long-Time Inverse Curve: C4324
- Figure 9.10 I.E.C. Short-Time Inverse Curve: C5325
- Relay Word Bits (Used in SEL OGIC Control Equations)326
- Table 9.5 SEL-351A Relay Word Bits326
- Table 9.6 Relay Word Bit Definitions for SEL-351A328
- Settings Explanations344
- Table 9.7 Main Relay Functions that Change with VSCONN, When PTCONN = WYE347
- Table 9.8 Main Relay Functions that Change with VSCONN, When PTCONN = DELTA348
- Table 9.9 Main Relay Functions that Change with VNOM = off348
- Figure 9.11 Operation of DELTA and 3V0 Relay Word Bits348
- Figure 9.12 Hybrid Power System with Neutral-Ground Resistor350
- Settings Sheets352
SEL-351A Settings Sheets353
SEL-351A-1 Settings Sheets385
Section 10: Serial Port Communications and Commands411
- Overview411
- Table 10.1 SEL-351A Available Serial Ports411
- Port Connector and Communications Cables412
- Table 10.2 Pinout Functions for EIA-232 Serial Ports 2, 3, and412
- Table 10.3 Terminal Functions for EIA-485 Serial Port 1412
- Figure 10.1 DB-9 Connector Pinout for EIA-232 Serial Ports412
- Table 10.4 Serial Communications Port Pin/Terminal Function Definitions414
- Communications Protocol416
- Serial Port Automatic Messages419
- Table 10.5 Serial Port Automatic Messages419
- Serial Port Access Levels420
- Command Summary422
- Table 10.6 Serial Port Command Summary422
- Command Explanations424
- Table 10.7 SEL-351A Word and Its Correspondence to TAR Command441
- Table 10.8 SEL-351A Control Subcommands447
- Table 10.9 Valid Password Characters448
SEL-351A Command Summary451
Section 11: Front-Panel Interface (Only on Models with LCD)455
- Overview455
- Front-Panel Pushbutton Operation456
- Figure 11.1 Front-Panel Pushbuttons-Overview456
- Figure 11.2 Front-Panel Pushbuttons-Primary Functions457
- Figure 11.3 Front-Panel Pushbuttons-Primary Functions (Continued)458
- Figure 11.4 Front-Panel Pushbuttons-Secondary Functions459
- Functions Unique to the Front-Panel Interface460
- Figure 11.5 Local Control Switch Configured as an ON/OFF Switch462
- Figure 11.6 Local Control Switch Configured as an OFF/MOMENTARY Switch462
- Figure 11.7 Local Control Switch Configured as an ON/OFF/MOMENTARY Switch462
- Rotating Default Display466
Section 12: Standard Event Reports and SER473
- Overview473
- Standard 15/30-Cycle Event Reports474
- Figure 12.1 Example Event Summary476
- Table 12.1 Event Types477
- Figure 12.2 Example Synchrophasor-Level Precise Event Report 1/16-Cycle Resolution480
- Table 12.2 Standard Event Report Current, Voltage, and Frequency Columns481
- Table 12.3 Output, Input, and Protection, and Control Element Event Report Columns484
- Sequential Events Recorder (SER) Report493
- Example Standard 15-Cycle Event Report496
- Figure 12.4 Example Partial Event Report with Delta-Connected Pts499
- Figure 12.5 Derivation of Event Report Current Values and RMS Current Values from Sampled Current Waveform500
- Figure 12.6 Derivation of Phasor RMS Current Values from Event Report Current Values501
- Example Sequential Events Recorder (SER) Report502
- Figure 12.7 Example Sequential Events Recorder (SER) Event Report502
Section 13: Testing and Troubleshooting505
- Overview505
- Testing Philosophy506
- Testing Methods and Tools509
- Table 13.1 Test Features Provided by the Relay509
- Table 13.2 Resultant Scale Factors for Input Module510
- Figure 13.1 Low-Level Test Interface (J1 or J10) Connector510
- Relay Self-Tests513
- Table 13.3 Relay Self-Tests513
- Relay Troubleshooting515
- Relay Calibration517
- Factory Assistance518
- Table A.1 SEL-351A Firmware Revision History519
Appendix A: Firmware and Manual Versions Firmware520
- Table A.2 SEL-351A-1 Firmware Revision History523
- Table A.3 Instruction Manual Revision History525
Appendix B: Firmware Upgrade Instructions535
- Overview535
- Relay Firmware Upgrade Instructions536
- Figure B.1 Establishing a Connection538
- Figure B.2 Determining the Computer Serial Port538
- Figure B.3 Determining Communications Parameters for the Computer539
- Figure B.4 Setting Terminal Emulation539
- Figure B.5 Terminal Emulation Startup Prompt540
- Figure B.6 Correcting the Port Setting540
- Figure B.7 Correcting the Communications Parameters541
- Figure B.8 Preparing Hyperterminal for ID Command Display542
- Figure B.9 List of Commands Available in SEL543
- Figure B.10 Matching Computer to Relay Parameters544
- Figure B.11 Example Receive File Dialog Box545
- Figure B.12 Example Filename Identifying Old Firmware Version545
- Figure B.13 Downloading Old Firmware545
- Figure B.14 Selecting New Firmware to Send to the Relay547
- Figure B.15 Transferring New Firmware to the Relay547
- Table B.1 Troubleshooting New Firmware Upload548
Appendix C: SEL Distributed Port Switch Protocol559
- Overview559
- Settings560
- Operation561
Appendix D: Configuration, Fast Meter, and Fast Operate Commands563
- Overview563
- Message Lists564
- Table D.1 Binary Message List564
- Table D.2 ASCII Configuration Message List564
  - Message Definitions565
- Table D.3 A5C0 Relay Definition Block565
- Table D.4 A5C1 Fast Meter Configuration Block565
- Table D.5 A5D1 Fast Meter Data Block567
- Table D.6 A5C2/A5C3 Demand/Peak Demand Fast Meter Configuration Messages567
- Table D.7 A5D2/A5D3 Demand/Peak Demand Fast Meter Message570
- Table D.8 A5CE Fast Operate Configuration Block571
- Table D.9 A5E0 Fast Operate Remote Bit Control572
- Table D.10 A5E3 Fast Operate Breaker Control573
- Table D.11 A5CD Fast Operate Reset Definition Block573
- Table D.12 A5ED Fast Operate Reset Command574
Appendix E: Compressed ASCII Commands577
- Overview577
- CASCII Command-General Format578
- CASCII Command-SEL-351A580
- CSTATUS Command-SEL-351A581
- CHISTORY Command-SEL-351A582
- CEVENT Command-SEL-351A583
- Table E.1 Mapping Labels to Bits585
Appendix F: Setting Negative-Sequence Overcurrent Elements587
- Setting Negative-Sequence Definite-Time Overcurrent Elements587
- Setting Negative-Sequence Time-Overcurrent Elements588
- Figure F.1 Minimum Response Time Added to a Negative-Sequence Time-Overcurrent Element 51QT588
- Coordinating Negative-Sequence Overcurrent Elements589
- Figure F.2 Distribution Feeder Protective Devices590
- Figure F.3 Traditional Phase Coordination590
- Figure F.4 Phase-To-Phase Fault Coordination591
- Figure F.5 Negative-Sequence Overcurrent Element Derived from "Equivalent" Phase Overcurrent Element, 51EP592
- Other Negative-Sequence Overcurrent Element References594
Appendix G: Setting SEL OGIC Control Equations595
- Overview595
- Relay Word Bits596
- SEL OGIC Control Equations598
- Figure G.1 Result of Rising-Edge Operators on Individual Elements in Setting er601
- Figure G.2 Result of Falling-Edge Operator on a Deasserting Underfrequency Element602
- Table G.2 SEL OGIC Control Equation Settings Limitations604
  - Processing Order and Processing Interval606
- Table G.3 Processing Order of Relay Elements and Logic (Top to Bottom)606
Appendix H: Distributed Network Protocol609
- Overview609
- Configuration610
- Table H.1 Settings to Configure a Port for DNP610
- Table H.2 Settings to Configure a Port for Extended Mode DNP610
- Table H.3 Data Access Methods614
  - Device Profile615
- Table H.4 SEL-351A DNP3 Device Profile615
  - Object Table617
- Table H.5 SEL-351A DNP Object Table617
  - Data Map622
- Table H.6 SEL-351A DNP Data Map622
- Table H.7 Analog 105 Upper-Byte Definitions625
- Table H.8 Analog 105 Lower-Byte Definitions625
- Table H.9 Control Field625
  - Point Remapping628
DNP Settings Sheets629
SET: Appendix I: Using the SEL-251 and SEL-267 Relay Settings in the SEL-351A Relay631
Appendix Jsel-351A Fast SER Protocol637
- Overview637
- Make Sequential Events Recorder (SER) Settings with Care638
- Recommended Message Usage639
- Functions and Function Codes640
- Table J.3 Message Format for Function Code 18641
- Table J.4 Message if SER Records Are Lost642
- Table J.5 Acknowledge Message Format643
- AC SEL ERATOR Quickset SEL-5030 Software646
Appendix K: ACSELERATOR Quickset SEL-5030 Software646
- AC SEL ERATOR Quickset System Requirements646
- Installation647
- Starting AC SEL ERATOR Quickset648
Appendix Lsel Synchrophasors649
- Overview649
- Introduction650
- Synchrophasor Measurement651
- Figure L.1 Phase Reference651
- External Equipment Compensation652
- Figure L.2 Waveform at Relay Terminals May Have Phase Shift652
- Figure L.3 Correction of Measured Phase Angle652
- Protocol Operation653
- Table L.1 SEL Fast Message Protocol Format653
- Table L.2 Unsolicited Fast Message Enable Packet654
- Table L.3 Unsolicited Fast Message Disable Packet654
- Table L.4 Permissible Message Periods Requested by Enable Message655
- Settings656
- Table L.5 SEL-351A Global Settings for Synchrophasors656
- Table L.6 SEL-351A Serial Port Settings for Synchrophasors656
- Synchrophasor Relay Word Bits659
- Table L.7 Time Synchronization Relay Word Bits659
- View Synchrophasors by Using the MET PM Command660
- Figure L.4 Sample MET PM Command Response661
- Communications Bandwidth662
- Table L.8 SEL Fast Message Voltage and Current Selections Based on PHDATAV and PHDATAI662

Schweitzer Engineering Laboratories SEL-351A - Synchrophasor Relay Word Bits; Table L.7 Time Synchronization Relay Word Bits

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