12.19
Date Code 20080213 Instruction Manual SEL-351A Relay
Standard Event Reports and SER
Standard 15/30-Cycle Event Reports
Lcl 56 LB5, LB6 5 Local bit LB5 asserted.
6 Local bit LB6 asserted.
b Both LB5 and LB6 asserted.
Lcl 78 LB7, LB8 7 Local bit LB7 asserted.
8 Local bit LB8 asserted.
b Both LB7 and LB8 asserted.
Rem 12 RB1, RB2 1 Remote bit RB1 asserted.
2 Remote bit RB2 asserted.
b Both RB1 and RB2 asserted.
Rem 34 RB3, RB4 3 Remote bit RB3 asserted.
4 Remote bit RB4 asserted.
b Both RB3 and RB4 asserted.
Rem 56 RB5, RB6 5 Remote bit RB5 asserted.
6 Remote bit RB6 asserted.
b Both RB5 and RB6 asserted.
Rem 78 RB7, RB8 7 Remote bit RB7 asserted.
8 Remote bit RB8 asserted.
b Both RB7 and RB8 asserted.
Rem OC OC, CC o OPE (Open) command executed.
c CLO (Close) command executed.
Ltch 12 LT1, LT2 1 Latch bit LT1 asserted.
2 Latch bit LT2 asserted.
b Both LT1 and LT2 asserted.
Ltch 34 LT3, LT4 3 Latch bit LT3 asserted.
4 Latch bit LT4 asserted.
b Both LT3 and LT4 asserted.
Ltch 56 LT5, LT6 5 Latch bit LT5 asserted.
6 Latch bit LT6 asserted.
b Both LT5 and LT6 asserted.
Ltch 78 LT7, LT8 7 Latch bit LT7 asserted.
8 Latch bit LT8 asserted.
b Both LT7 and LT8 asserted.
SEL
OGIC Var 1
SEL
OGIC Var 2
SELOGIC Var 3
SEL
OGIC Var 4
SV1, SV1T
SV2, SV2T
SV3, SV3T
SV4, SV4T
pSEL
OGIC control equation variable
timer input SV_ asserted; timer
timing on pickup time; timer output
SV_T not asserted.
Table 12.3 Output, Input, and Protection, and Control Element Event Report
Columns (Sheet 8 of 9)
Column Heading
Corresponding
Elements (Relay
Word Bits)
Symbol Definition
Courtesy of NationalSwitchgear.com
To Next Page
Loading...