RM0440 Rev 4 107/2126
RM0440 Embedded Flash memory (FLASH) for category 3 devices
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Read from bank 1 while mass erasing bank 2 (or vice versa)
While executing a program code from bank 1, it is possible to perform a mass erase
operation on bank 2 (and vice versa). Follow the procedure below:
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the Flash
status register (FLASH_SR) (BSY is active when erase/program operation is on going
in bank 1 or bank 2).
2. Set MER1 or MER2 to in the Flash control register (FLASH_CR).
3. Set the STRT bit in the FLASH_CR register.
4. Wait for the BSY bit to be cleared (or use the EOP interrupt).
Read from bank 1 while programming bank 2 (or vice versa)
While executing a program code from bank 1, it is possible to perform a program operation
on the bank 2. (and vice versa). Follow the procedure below:
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the Flash
status register (FLASH_SR) (BSY is active when erase/program operation is on going
on bank 1 or bank 2).
2. Set the PG bit in the Flash control register (FLASH_CR).
3. Perform the data write operations at the desired address memory inside the main
memory block or OTP area.
4. Wait for the BSY bit to be cleared (or use the EOP interrupt).
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