ST STM32G474 - Preloaded)

RM0440 Rev 4 1453/2126
RM0440 Basic timers (TIM6/TIM7)
1463
Figure 487. Counter timing diagram, update event when ARPE = 0 (TIMx_ARR not
preloaded)
MSv62303V1
FF 36
tim_psc_ck
tim_cnt_ck
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
00
02
03 04 05
06
0732
33
34 35
36
31
01
CEN
Auto-reload preload register
Write a new value in TIMx_ARR