ST STM32G474 User Manual

Analog-to-digital converters (ADC) RM0440
604/2126 RM0440 Rev 4
21.4 ADC functional description
21.4.1 ADC block diagram
Figure 82 shows the ADC block diagram and Table 160 gives the ADC pin description.
Figure 82. ADC block diagram
MSv46143V4
adc_ext0_trg
CONT
SMPx[2:0]
sampling time
Start & Stop
Control
ADC_INP[18:0]
analog input
channels
AUTDLY
auto delayed
ADSTP
stop conv
S/W trigger
EXTEN[1:0]
trigger enable
and edge selection
h/w
trigger
EXTi mapped
at product level
EXTSEL[4:0]
trigger selection
ADEN/ADDIS
ADCAL
Analog Supply (VDDA)
1.62V to 3.6 V
V
REF+
1.62 to 3.6 V
ALIGN
left/right
RES[1:0]
12, 10, 8 bits
OVRMOD
overrun mode
DMAEN
adc_dma
adc_it
AHB
adc_awd1
JEXTEN[1:0]
trigger enable
and edge selection
H/W
trigger
JEXTSEL[4:0] trigger
selection
JEXTi mapped
at product level
JL[1:0], JSQx[4:0]
L[3:0], SQx[4:0]
JAUTO
DMACFG
AWD1EN
JAWD1EN
Analog watchdog 1,2,3
AWD1SGL
J S/W trigger
AWD1CH[4:0]
JQM
Injced Context
Queue Mode
LT1[11:0]
HT1[11:0]
JDISCEN
JDISCNUM[2:0]
DISCEN
DISCNUM[2:0]
Discontinuous
mode
AWD1
AWD2CH[18:0]
AWD3CH[18:0]
LT2[7:0]
HT2[7:0]
LT3[7:0]
HT3[7:0]
AWD2
AWD3
.......
.......
slave
master
RDATA[15:0]
V
REF-
V
TS
V
REFINT
V
BAT
/3
V
INP[18:0]
V
INN[18:0]
JDATA1[15:0]
JDATA2[15:0]
JDATA3[15:0]
JDATA4[15:0]
ROVSM
TROVS
JOVSE
ROVSE
OVSS[3:0]
OVSR[2:0]
Oversampling
options
DEEPPWD
REG
ADVREGEN
ADCALDIF
JQDIS
SMPTRIG
BULB
SWTRIG
SMPPLUS
AWDFILT[2:0]
OFFSETy[11:0]
OFFSETPOS
SATEN
OFFSETy_CH[4:0]
OFFSETy_EN
DIFSEL[18:0]
CALFACT_D/S[6:0]
GCOMPCOEFF
[13:0]
GCOMP
ADC_INN[18:0]
AHB
interface
AREADY
EOSMP
EOC
EOS
OVR
JEOS
JQOVF
AWDx
Input
selection &
scan control
V
IN
start
CONVERTED
DATA
Bias & Ref
SAR ADC
Oversampler
/Gain&Offset
adc_ext1_trg
adc_ext2_trg
adc_ext29_trg
adc_ext30_trg
adc_ext31_trg
adc_jext0_trg
adc_jext1_trg
adc_jext2_trg
adc_jext29_trg
adc_jext30_trg
adc_jext31_trg
adc_awd2
adc_awd3
adc_ker_ck
adc_hclk

ST STM32G474 Specifications

General

Brand	ST
Model	STM32G474
Category	Microcontrollers
Language	English