Analog-to-digital converters (ADC) RM0440
650/2126 RM0440 Rev 4
ADC overrun (OVR, OVRMOD)
The overrun flag (OSR) notifies of that a buffer overrun event occurred when the regular
converted data has not been read (by the CPU or the DMA) before new converted data
became available.
The OVR flag is set if the EOC flag is still 1 at the time when a new conversion completes.
An interrupt can be generated if bit OVRIE=1.
When an overrun condition occurs, the ADC is still operating and can continue converting
unless the software decides to stop and reset the sequence by setting bit ADSTP=1.
OVR flag is cleared by software by writing 1 to it.
It is possible to configure if data is preserved or overwritten when an overrun event occurs
by programming the control bit OVRMOD:
• OVRMOD=0: The overrun event preserves the data register from being overrun: the
old data is maintained and the new conversion is discarded and lost. If OVR remains at
1, any further conversions will occur but the result data will be also discarded.
• OVRMOD=1: The data register is overwritten with the last conversion result and the
previous unread data is lost. If OVR remains at 1, any further conversions will operate
normally and the ADC_DR register will always contain the latest converted data.
Figure 119. Example of overrun (OVR)
Note: There is no overrun detection on the injected channels since there is a dedicated data
register for each of the four injected channels.
Managing a sequence of conversions without using the DMA
If the conversions are slow enough, the conversion sequence can be handled by the
software. In this case the software must use the EOC flag and its associated interrupt to
handle each data. Each time a conversion is complete, EOC is set and the ADC_DR
register can be read. OVRMOD should be configured to 0 to manage overrun events as an
error.
Overun
MS31019V1
ADSTART
(1)
EOC
EOS
TRGx
(1)
ADC state
(2)
ADC_DR read access
by s/w by h/w
Indicative timings
triggered
RDY
CH1
CH2
CH5
CH3
CH4
CH6
CH7
STOP
RDY
D2
D1
D2D1
D6
D3
D4
D3
D4
D5
ADSTP
OVR
ADC_DR
(OVRMOD=0)
ADC_DR
(OVRMOD=1)
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