General-purpose timers (TIM15/TIM16/TIM17) RM0440
1348/2126 RM0440 Rev 4
Table 288 and Table 289 list the sources connected to the tim_ti[1..2] input multiplexers.
Table 287. TIM internal input/output signals
Internal signal
name
Signal type Description
tim_ti1_in[15:0]
tim_ti2_in[15:0]
(1)
1. Available for TIM15 only.
Input
Internal timer inputs bus. These inputs can be used for capture or
as external clock (below 1/4 of the tim_ker_ck clock).
tim_itr[15:0]
(1)
Input
Internal trigger input bus. These inputs can be used for the slave
mode controller or as a input clock (below 1/4 of the tim_ker_ck
clock).
tim_trgo
(1)
Output
Internal trigger output. This trigger can trigger other on-chip
peripherals.
tim_ocref_clr[7:0] Input
Timer tim_ocref_clr input bus. These inputs can be used to clear
the tim_ocxref signals, typically for hardware cycle-by-cycle
pulsewidth control.
tim_brk_cmp[7:1] Input Break input for internal signals
tim_sys_brk[n:0] Input
System break input. This input gathers the MCU’s system level
errors.
tim_pclk Input Timer APB clock
tim_ker_ck Input
Timer kernel clock. This clock must be synchronous with tim_pclk
(derived from the same source). The clock ratio
tim_ker_ck/tim_pclk must be an integer:1, 2, 3,..., 16 (maximum
value)
tim_it Output
Global Timer interrupt, gathering capture/compare, update, break
trigger and commutation requests
tim_cc1_dma
tim_cc2_dma
(1)
Output Timer capture / compare 1..2 dma requests
tim_upd_dma Output Timer update dma request
tim_trg_dma Output Timer trigger dma request
tim_com_dma Output Timer commutation dma request
Table 288. Interconnect to the tim_ti1 input multiplexer
tim_ti1 inputs
Sources
TIM15 TIM16 TIM17
tim_ti1_in0 TIM15_CH1 TIM16_CH1 TIM17_CH1
tim_ti1_in1 LSE comp6_out comp5_out
tim_ti1_in2 comp1_out MCO MCO
tim_ti1_in3 comp2_out HSE / 32
(1)
HSE / 32
(1)
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