RM0440 Rev 4 1827/2126
RM0440 Serial audio interface (SAI)
1858
Follow the sequence below to configure the SAI interface in DMA mode:
1. Configure SAI and FIFO threshold levels to specify when the DMA request will be
launched.
2. Configure SAI DMA channel.
3. Enable the DMA.
4. Enable the SAI interface.
Note: Before configuring the SAI block, the SAI DMA channel must be disabled.
40.4 SAI interrupts
The SAI supports 7 interrupt sources as shown in Table 371.
Table 371. SAI interrupt sources
Interrupt
acronym
Interrupt
source
Interrupt
group
Audio block mode
Interrupt
enable
Interrupt clear
SAI
FREQ FREQ
Master or slave
Receiver or
transmitter
FREQIE in
SAI_xIM
register
Depends on:
– FIFO threshold setting (FLVL bits
in SAI_xCR2)
– Communication direction
(transmitter or receiver)
For more details refer to
Section 40.3.9: Internal FIFOs
OVRUDR ERROR
Master or slave
Receiver or
transmitter
OVRUDRIE in
SAI_xIM
register
COVRUDR = 1 in SAI_xCLRFR
register
AFSDET ERROR
Slave
(not used in AC’97
mode and SPDIF
mode)
AFSDETIE in
SAI_xIM
register
CAFSDET = 1 in SAI_xCLRFR
register
LFSDET ERROR
Slave
(not used in AC’97
mode and SPDIF
mode)
LFSDETIE in
SAI_xIM
register
CLFSDET = 1 in SAI_xCLRFR
register
CNRDY ERROR
Slave
(only in AC’97 mode)
CNRDYIE in
SAI_xIM
register
CCNRDY = 1 in SAI_xCLRFR
register
MUTEDET MUTE
Master or slave
Receiver mode only
MUTEDETIE in
SAI_xIM
register
CMUTEDET = 1 in SAI_xCLRFR
register
WCKCFG ERROR
Master with NODIV =
0 in SAI_xCR1
register
WCKCFGIE in
SAI_xIM
register
CWCKCFG = 1 in SAI_xCLRFR
register